A semiconductor device includes a conductive frame comprising a die attach surface that is substantially planar, a semiconductor die comprising a first load on a rear surface and a second terminal disposed on a main surface, a first conductive contact structure disposed on the die attach surface, and a second conductive contact structure on the main surface. The first conductive contact structure vertically extends past a plane of the main surface of the semiconductor die. The first conductive contact structure is electrically isolated from the main surface of the semiconductor die by an electrical isolation structure. An upper surface of the electrical isolation structure is below the main surface of the semiconductor die.

Provided is a semiconductor package using a conductive metal structure, and more particularly, to a semiconductor package using a conductive metal structure formed in a clip or a column, through which a semiconductor chip and a lead of a lead frame are electrically connected to each other and an area where the semiconductor chip and the metal structure are adhered may be effectively improved so that productivity may increase and durability and electrical connection properties may be improved. The semiconductor package according to the present invention includes: a semiconductor chip; an aluminum pad formed on an upper part of the semiconductor chip; and a conductive metal structure adhered to the aluminum pad by a solder-based second adhesive layer, wherein the second adhesive layer includes intermetallic compounds (IMC) distributed to a lower fixed part thereof near the aluminum pad.

A semiconductor apparatus capable of sufficiently securing adhesion between a lead frame and sealing resin body. The semiconductor apparatus includes a lead frame, semiconductor device bonded to a mounting surface of the lead frame, and sealing resin body that covers the surface of the semiconductor device and a surrounding region of the semiconductor device on the mounting surface, in which in the surrounding region, a plurality of circular concave portions is formed with a predetermined pitch in a plurality of rows so as to surround the semiconductor device, and when the pitch and depth of concave portions arranged in at least the innermost peripheral row of the rows that surround the semiconductor device are represented as P[μm] and H[μm],respectively, and the flexural modulus of elasticity of the sealing resin body is represented as E[GPa], the following Formulae (1) and (2) are satisfied:

E[GPa]≤20[GPa]  (1)

5≤86.4−5.45×E[GPa]+0.164×P[μm]≤H[μm]  (2)

An object of the present disclosure is to suppress variation in currents flowing through semiconductor elements and thereby to achieve size reduction of the semiconductor elements. The semiconductor power module includes electrode terminals for connecting a first electrode to a first external electric component, a second electrode joined to upper surfaces of a plurality of semiconductor elements, and a second electrode extension portion for connecting the second electrode to a second external electric component. The sum of a current path length from the electrode terminal to the semiconductor element in the first electrode and a current path length from the semiconductor element to a second electrode terminal portion in the second electrode, is set to be the same among the plurality of semiconductor elements.

A semiconductor package is fabricated by attaching a first component to a second component. The first component is assembled by forming a first redistribution structure over a substrate. A through via is then formed over the first redistribution structure, and a die is attached to the first redistribution structure active-side down. The second component includes a second redistribution structure, which is then attached to the through via. A molding compound is deposited between the first redistribution structure and the second redistribution structure and further around the sides of the second component.

A semiconductor device package and a method for packaging the same are provided. A semiconductor device package includes a carrier, an electronic component, a buffer layer, a reinforced structure, and an encapsulant. The electronic component is disposed over the carrier and has an active area. The buffer layer is disposed on the active area of the electronic component. The reinforced structure is disposed on the buffer layer. The encapsulant encapsulates the carrier, the electronic component and the reinforced structure.

Multi-die structures and methods of fabrication are described. In an embodiment, a multi-die structure includes a first die, a second die, and die-to-die routing connecting the first die to the second die. The die-to-die interconnection may be monolithically integrated as a chip-level die-to-die routing, or external package-level die-to-die routing.

A semiconductor structure and a method of forming the same are provided. The semiconductor structure includes a first substrate; a first adhesive layer disposed on the surface of the first substrate; a first buffer layer disposed on the surface of the first adhesive layer; and a first bonding layer disposed on the surface of the first buffer layer, wherein the densities of the first adhesive layer and the first buffer layer are greater than that of the first bonding layer. The first adhesive layer of the semiconductor structure has higher adhesion with the first substrate and the first buffer layer, and the first buffer layer and the first bonding layer exhibit higher adhesion, which are beneficial to improve the performance of the semiconductor structure.

The present invention relates to a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a first substrate; a first adhesive layer disposed on a surface of the first substrate; and a first bonding layer disposed on a surface of the first adhesive layer. A density of the first adhesive layer is greater than a density of the first bonding layer. The first adhesive layer of the semiconductor structure has higher adhesion with the first substrate and first bonding layer, such that it is advantageous to improve a performance of the semiconductor structure.

A semiconductor substrate (1) has a front surface and a back surface that are opposite each other. A first metal layer (2) is formed on the front surface of the semiconductor substrate (1). A second metal layer (3) for soldering is formed on the first metal layer (2). A third metal layer (5) is formed on the back surface of the semiconductor substrate (1). A fourth metal layer (6) for soldering is formed on the third metal layer (5). The second metal layer (3) has a larger thickness than that of the fourth metal layer (6). The first, third, and fourth metal layers (2,5,6) are not divided in a pattern. The second metal layer (3) is divided in a pattern and has a plurality of metal layers electrically connected to each other via the first metal layer (2).