H01L2224/32506

Method for wafer bonding and compound semiconductor wafer

A method for wafer bonding includes: providing a semiconductor wafer having a first main face; fabricating at least one semiconductor device in the semiconductor wafer, wherein the semiconductor device is arranged at the first main face; generating trenches and a cavity in the semiconductor wafer such that the at least one semiconductor device is connected to the rest of the semiconductor wafer by no more than at least one connecting pillar; arranging the semiconductor wafer on a carrier wafer such that the first main face faces the carrier wafer; attaching the at least one semiconductor device to the carrier wafer; and removing the at least one semiconductor device from the semiconductor wafer by breaking the at least one connecting pillar.

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING THROUGH SILICON PLUGS

A method of making a semiconductor device is provided including forming a first opening and a second opening in a first surface of a substrate. A conductive material is formed in the first opening and in the second opening and over the first surface in the first region of the substrate between the openings. A thickness of the substrate may be reduced from a second surface of the substrate, opposite the first surface, to a third surface opposite the first surface which exposes the conductive material in the first opening and the conductive material in the second opening. A light emitting diode (LED) device is connected to the third surface of the substrate.

PROCESS OF FORMING SEMICONDUCTOR APPARATUS MOUNTING ON SUBSTRATE
20180240765 · 2018-08-23 ·

A process of forming a semiconductor apparatus is disclosed. The process includes steps of: depositing a first metal layer containing Ni in a back surface of a substrate, plating the back surface of the substrate so as to expose the first metal layer in a portion of the scribe line, depositing a third metal layer on the whole back surface of the substrate, and selectively removing the third metal layer in the portion of the scribe line so as to leave the first metal layer in the scribe line.

Method of manufacturing a semiconductor device including through silicon plugs

A method of making a semiconductor device is provided including forming a first opening and a second opening in a first surface of a substrate. A conductive material is formed in the first opening and in the second opening and over the first surface in the first region of the substrate between the openings. A thickness of the substrate may be reduced from a second surface of the substrate, opposite the first surface, to a third surface opposite the first surface which exposes the conductive material in the first opening and the conductive material in the second opening. A light emitting diode (LED) device is connected to the third surface of the substrate.

Low-Temperature Bonding With Spaced Nanorods And Eutectic Alloys
20180200840 · 2018-07-19 ·

Bonded surfaces are formed by adhering first nanorods and second nanorods to respective first and second surfaces. The first shell is formed on the first nanorods and the second shell is formed on the second nanorods, wherein at least one of the first nanorods and second nanorods, and the first shell and the second shell are formed of distinct metals. The surfaces are then exposed to at least one condition that causes the distinct metals to form an alloy, such as eutectic alloy having a melting point below the temperature at which the alloy is formed, thereby bonding the surfaces upon which solidification of the alloy.

Apparatus for eutectic bonding

An apparatus for eutectic bonding includes (a) a bonding frame that includes two substrates and (b) a frame device situated on the substrates, the frame device including two frames, the apparatus being usable to develop a eutectic, formed during bonding, in a spatially defined manner, whereby a volume formed by the frames and the substrates can be filled up completely with the eutectic.

Substrate composite, method and device for bonding of substrates
09682539 · 2017-06-20 ·

A method for bonding a first substrate to a second substrate including the steps of: making contact of a first contact area of the first substrate with a second contact area of the second substrate, which second area is aligned parallel to the first contact area, as a result of which a common contact area is formed; and producing a bond interconnection between the first substrate and the second substrate outside the common contact area. The invention also relates to a corresponding device and a substrate composite of a first substrate and a second substrate, in which a first contact area of the first substrate with a second contact area of the second substrate, which second area is aligned parallel to the first contact area, forms a common contact area, outside the common contact area there being a bond interconnection between the first substrate and the second substrate.

Solid metal foam thermal interface material
12300567 · 2025-05-13 · ·

Solid metal foam thermal interface materials and their uses in electronics assembly are described. In one implementation, a method includes: applying a thermal interface material (TIM) between a first device and a second device to form an assembly having a first surface of the TIM in in touching relation with a surface of the first device, and a second surface of the TIM opposite the first surface in touching relation with a surface of the second device, the TIM comprising a solid metal foam and a first liquid metal; and compressing the assembly to form an alloy from the TIM that bonds the first device to the second device.

Liquid metal thermal interface
12451402 · 2025-10-21 · ·

Liquid metal thermal interface materials and their uses in electronics assembly are described. In one implementation, a semiconductor assembly includes: a semiconductor die; a heat exchanger; and a thermal interface material (TIM) alloy bonding the semiconductor die to the heat exchanger without using a separate metallization layer on a surface of the semiconductor die or a surface of the heat exchanger. The TIM alloy may be formed by placing a TIM material between the semiconductor die and the heat exchanger, the TIM material comprising a first liquid metal foam in touching relation with the surface of the semiconductor die, a second liquid metal foam in touching relation with the surface of the heat exchanger.