H01L2224/48106

Low stress asymmetric dual side module

Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.

Semiconductor device and power amplifier module

A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

LIGHT-EMITTING SUBSTRATE, METHOD OF MANUFACTURING LIGHT-EMITTING SUBSTRATE, AND DISPLAY DEVICE

A light-emitting substrate, a method of manufacturing a light-emitting substrate, and a display device are provided. The light-emitting substrate includes: a first substrate, wherein the first substrate includes a first base substrate, a light-emitting diode arranged on the first base substrate, and a first conductive pad arranged on the first base substrate; a second substrate arranged opposite to the first substrate, wherein the second substrate includes a second base substrate, and a second conductive pad arranged on the second base substrate; and a bonding wire structure including a bonding wire, wherein the first conductive pad is located on a surface of the first substrate away from the second substrate, the second conductive pad is located on a surface of the second substrate away from the first substrate, and the bonding wire is configured to electrically connect the first conductive pad and the second conductive pad.

Biometric sensor and device including the same

A display device includes a display panel, a cover glass disposed on the display panel, and a biometric sensor device disposed below the display panel. The biometric sensor device includes a printed circuit board, a biometric sensor disposed on the printed circuit board, and a housing disposed on the printed circuit board and in which an opening is formed. The biometric sensor is disposed in the opening of the housing and is attached to a surface of the display panel through the housing.

Method of adjusting optical system

A method for adjusting an optical system is provided, including a positioning device positioning a first optical module; a measuring device measuring an angular difference between a main axis of the first optical module and an optical axis of an optical element sustained by the first optical module to obtain a measurement information; an adjusting device changing the shape of an adjustment assembly of the first optical module according to the measurement information; and assembling the first optical module with an optical object, wherein the optical axis of the optical element is parallel to a central axis of the optical object.

Tableted epoxy resin composition for encapsulation of semiconductor device and semiconductor device encapsulated using the same

A tableted epoxy resin composition for encapsulation of semiconductor devices and a semiconductor device encapsulated using the tableted epoxy resin composition, the tableted epoxy resin composition satisfying the following conditions (i) a proportion of tablets of the tableted epoxy resin composition having a diameter of greater than or equal to 0.1 mm and less than 2.8 mm and a height of greater than or equal to 0.1 mm and less than 2.8 mm is about 97 wt % or more, as measured by sieve analysis using ASTM standard sieves; (ii) the tablets have a packed density of greater than about 1.7 g/mL; and (iii) a ratio of packed density to cured density of the tablets is about 0.6 to about 0.87.

Semiconductor device
11646251 · 2023-05-09 · ·

The semiconductor device includes a semiconductor element, a first lead, and a second lead. The semiconductor element has an element obverse surface and an element reverse surface spaced apart from each other in a thickness direction. The semiconductor element includes an electron transit layer disposed between the element obverse surface and the element reverse surface and formed of a nitride semiconductor, a first electrode disposed on the element obverse surface, and a second electrode disposed on the element reverse surface and electrically connected to the first electrode. The semiconductor element is mounted on the first lead, and the second electrode is joined to the first lead. The second lead is electrically connected to the first electrode. The semiconductor element is a transistor. The second lead is spaced apart from the first lead and is configured such that a main current to be subjected to switching flows therethrough.

CHIP-PACKAGE DEVICE
20230207512 · 2023-06-29 ·

A chip-package device includes a substrate, a first chip, a first conductive layer, first wirings, and second wirings. The substrate includes a first top surface and first connection pads disposed on the first top surface. The first chip is disposed on the first top surface, and the first chip includes a second top surface and second connection pads disposed on the second top surface. The first conductive layer is disposed on the second top surface. The first wirings connect the first connection pads and the first conductive layer, and the second wirings connect the second connection pads and another side of the first conductive layer. Each of the first wirings and each of the second wirings respectively connect opposite sides of the first conductive layer.

METHOD FOR MANUFACTURING WIRING BOARD
20170372980 · 2017-12-28 · ·

A method for manufacturing a wiring board includes forming on a first support plate a first laminated wiring portion including conductor and insulating layers such that the first portion has a first surface on first support plate side and a second surface, separating the first portion from the first plate, forming a conductor layer exposed on the first surface and including pads, laminating the first portion on a second support plate such that the second surface of the first portion faces second support plate side, forming on the first surface of the first portion a second laminated wiring portion including conductor and insulating layers such that the second portion has a third surface on second support plate side and a fourth surface, forming cavity in the second portion on the second plate such that the cavity exposes the pads, and separating the first and second portions from the second plate.

Semiconductor device having stacked chips
09853013 · 2017-12-26 · ·

According to one embodiment, a semiconductor device includes chips and a first selection circuit. Each of the chips has at least first and second vias for transmitting at least first and second address signals, wherein these chips are stacked to be electrically connected via the first and second vias. The first selection circuit is provided in each chip, and includes a logic circuit that selects a chip based on at least the first and second address signals, and supplies a result of operating the first and second address signals to the subsequent chip.