In order to inhibit forming cracks under a pad opening during ball bonding without increasing a chip size, a protective film includes a pad opening that exposes a part of a topmost layer metal film. A second metal film provided under the pad opening has a ring shape that defines a rectangular opening under the pad opening. The opening edge of the opening in the second metal film extends inwardly beyond the edge of the overlying pad opening.

A semiconductor package includes a substrate that includes a bonding pad, a first semiconductor chip disposed on the substrate, a second semiconductor chip disposed on a top surface of the first semiconductor chip that is opposite to the substrate, a chip pad disposed on the top surface of the first semiconductor chip, and a bonding wire that connects the chip pad to the bonding pad. The bonding wire includes a first upward protrusion and a second upward protrusion that are convexly curved in a direction away from the substrate. The second semiconductor chip has a first side surface between the first upward protrusion and the second upward protrusion.

A process of forming an electronic device includes providing a wire comprising a first ball at an end thereof, operating on the first ball to modify a surface of the first ball to form a modified surface, moving the first ball to a first location on a die, and bonding the first ball along the modified surface to the first location of the die. In an embodiment, the process further includes moving a bonding tool including the wire away from the die while the wire remains bonded to the die.

An electronic device includes an electronic element, and a wire bonded to the electronic element. The electronic element includes a bonding pad to which the wire is bonded. The main component of the bonding pad is Al. A metal is mixed in the wire, and the mixed metal is one of Pt, Pd and Au.

An electronic device includes an electronic element, and a wire bonded to the electronic element. The electronic element includes a bonding pad to which the wire is bonded. The main component of the bonding pad is Al. A metal is mixed in the wire, and the mixed metal is one of Pt, Pd and Au.

A process of forming an electronic device includes providing a wire comprising a first ball at an end thereof, operating on the first ball to modify a surface of the first ball to form a modified surface, moving the first ball to a first location on a die, and bonding the first ball along the modified surface to the first location of the die. In an embodiment, the process further includes moving a bonding tool including the wire away from the die while the wire remains bonded to the die. In another embodiment,

A current sensor device includes a casing having a cavity and a conductor fixedly mounted to the casing. A semiconductor chip configured to sense a magnetic field is arranged in the cavity. An electrically insulating medium is configured to at least partially fill the cavity of the casing.

A semiconductor device includes a substrate, a semiconductor chip having a first surface bonded to the substrate and a second surface that is opposite to the first surface and includes a first electrode pad and a second electrode pad thereon, the first electrode pad being electrically connected to a circuit of the semiconductor chip that is operated during operation of the semiconductor device and the second electrode pad being electrically separated from the circuit, a first wire extending between the first electrode pad and a terminal of the substrate that is electrically connected with an external device during operation of the semiconductor device, a second wire extending between the second electrode pad and the substrate, and a resin layer formed over the second surface of the semiconductor chip and covering the first and second wires.

An enhanced wire bond configuration for a light emitting diode (LED) package is presented herein. An optoelectronic component comprises a surface mountable package, the surface mountable package comprising: an LED chip that has been bonded, within a cavity of the surface mountable package, to a lead frame of the surface mountable package; a first bump that has been bonded onto a bond pad of the LED chip; a wire that has been ball bonded onto the lead frame; a wire stitch of the wire that has been formed on top of the first bump; and a second bump that has been bonded on top of the wire stitch. An encapsulant material including a defined softness can cover the LED chip, and can be added, injected, transfer-molded, and/or filled into the cavity. The defined softness can include a Shore hardness that is less than Shore 70A.

A semiconductor package is provided. The semiconductor package comprises a package substrate including first and second surfaces opposite to each other in a first direction, a plurality of substrate pads on the second surface, and first and second substrate edges respectively extending in a second direction intersecting the first direction and spaced apart from each other in a third direction intersecting the first and second directions, a first semiconductor chip on the package substrate, including third and fourth surfaces opposite to each other in the first direction, a plurality of chip pads and a plurality of chip dummy pad groups on the fourth surface, and first and second chip edges respectively extending in the second direction and spaced apart from each other in the third direction, and a plurality of first wires, each first wire of the plurality of first wires respectively connecting a respective substrate pad of the plurality of substrate pads with the plurality of chip pads, wherein the first chip edge is disposed to be closer to the first substrate edge than the second substrate edge, the plurality of substrate pads is disposed along the first substrate edge, the plurality of chip pads is disposed along the first chip edge, the first semiconductor chip includes third and fourth chip edges respectively extending in the third direction and spaced apart from each other in the second direction, a first corner formed at the intersection of the first chip edge and the third chip edge, a second corner formed at the intersection of first chip edge and the fourth chip edge, a third corner formed at the intersection of the second chip edge and the fourth chip edge, and a fourth corner formed at the intersection of the second chip edge and the third chip edge, and the plurality of chip dummy pad groups is respectively disposed on at least one of the first to fourth corners.