In one example, a method of manufacturing a semiconductor device includes providing a substrate having substrate terminals and providing a component having a first component terminal and a second component terminal adjacent to a first major side of the component. The method includes providing a clip structure having a first clip, a second clip, and a clip connector coupling the first clip to the second clip. The method includes coupling the first clip to the first component terminal and a first substrate terminal and coupling the second clip to a second substrate terminal. The method includes encapsulating the component, portions of the substrate, and portions of the clip structure. the method includes removing a sacrificial portion of the clip connector while leaving a first portion of the clip connector attached to the first clip and leaving a second portion of the clip connector attached to the second clip. In some examples, the first portion of the clip connector includes a first portion surface, the second portion of the clip connector includes a second portion surface, and the first portion surface and the second portion surface are exposed from a top side of the encapsulant after the removing. Other examples and related structures are also disclosed herein.

In one example, a method of manufacturing a semiconductor device includes providing a substrate having substrate terminals and providing a component having a first component terminal and a second component terminal adjacent to a first major side of the component. The method includes providing a clip structure having a first clip, a second clip, and a clip connector coupling the first clip to the second clip. The method includes coupling the first clip to the first component terminal and a first substrate terminal and coupling the second clip to a second substrate terminal. The method includes encapsulating the component, portions of the substrate, and portions of the clip structure. the method includes removing a sacrificial portion of the clip connector while leaving a first portion of the clip connector attached to the first clip and leaving a second portion of the clip connector attached to the second clip. In some examples, the first portion of the clip connector includes a first portion surface, the second portion of the clip connector includes a second portion surface, and the first portion surface and the second portion surface are exposed from a top side of the encapsulant after the removing. Other examples and related structures are also disclosed herein.

A semiconductor device includes: a semiconductor die having a metal region; a substrate having a metal region; and a soldered joint between the metal region of the semiconductor die and the metal region of the substrate. One or more intermetallic phases are present throughout the entire soldered joint, each of the one or more intermetallic phases formed from a solder preform diffused into the metal region of the semiconductor die and the metal region of the substrate. The soldered joint has the same length-to-width aspect ratio as the semiconductor die.

A semiconductor device includes: a semiconductor die having a metal region; a substrate having a metal region; and a soldered joint between the metal region of the semiconductor die and the metal region of the substrate. One or more intermetallic phases are present throughout the entire soldered joint, each of the one or more intermetallic phases formed from a solder preform diffused into the metal region of the semiconductor die and the metal region of the substrate. The soldered joint has the same length-to-width aspect ratio as the semiconductor die.

Provide is a highly reliable semiconductor device in which stress generated in a semiconductor chip is reduced and an increase in thermal resistance is suppressed. The semiconductor device includes: a semiconductor chip including a first main electrode on one surface thereof and a second main electrode and a gate electrode on the other surface thereof; a first electrode connected to the one surface of the semiconductor chip via a first bonding material; and a second electrode connected to the other surface of the semiconductor chip via a second bonding material. The first electrode is a plate-shaped electrode and has a groove in a region overlapping with the semiconductor chip. The groove penetrates in a thickness direction of the first electrode and reaches an end portion of the first electrode when viewed in a plan view.

Provide is a highly reliable semiconductor device in which stress generated in a semiconductor chip is reduced and an increase in thermal resistance is suppressed. The semiconductor device includes: a semiconductor chip including a first main electrode on one surface thereof and a second main electrode and a gate electrode on the other surface thereof; a first electrode connected to the one surface of the semiconductor chip via a first bonding material; and a second electrode connected to the other surface of the semiconductor chip via a second bonding material. The first electrode is a plate-shaped electrode and has a groove in a region overlapping with the semiconductor chip. The groove penetrates in a thickness direction of the first electrode and reaches an end portion of the first electrode when viewed in a plan view.

A semiconductor device according to an embodiment includes a lead frame, a semiconductor chip provided above the lead frame, and a bonding material including a sintered material containing a predetermined metal material and a predetermined resin, where the bonding material includes a first portion provided between the lead frame and the semiconductor chip, and a second portion provided on the lead frame around the semiconductor chip, where the bonding material bonds the lead frame and the semiconductor chip, wherein an angle formed by a lower face of the semiconductor chip and an upper face of the second portion adjacent to the lower face is 80 degrees or less.

A semiconductor device according to an embodiment includes a lead frame, a semiconductor chip provided above the lead frame, and a bonding material including a sintered material containing a predetermined metal material and a predetermined resin, where the bonding material includes a first portion provided between the lead frame and the semiconductor chip, and a second portion provided on the lead frame around the semiconductor chip, where the bonding material bonds the lead frame and the semiconductor chip, wherein an angle formed by a lower face of the semiconductor chip and an upper face of the second portion adjacent to the lower face is 80 degrees or less.

Since the solder 106 temporarily remaining in the first region 301 is in a state of being high in curvature, it is in point contact with the semiconductor element 105 at the vertex of the solder 106. Thereafter, the solder 106 is gradually wetted and spread from the center part to the peripheral part and from the first region 301 to the second region 302 while the semiconductor element 105 is pressed against the solder 106. At this time, since the solder 106 wets and spreads while discharging air, generation of voids can be suppressed.

Since the solder 106 temporarily remaining in the first region 301 is in a state of being high in curvature, it is in point contact with the semiconductor element 105 at the vertex of the solder 106. Thereafter, the solder 106 is gradually wetted and spread from the center part to the peripheral part and from the first region 301 to the second region 302 while the semiconductor element 105 is pressed against the solder 106. At this time, since the solder 106 wets and spreads while discharging air, generation of voids can be suppressed.