A semiconductor device includes: a first semiconductor chip having a first electrode and a second electrode on a first surface and having a third electrode on a second surface that is opposite to the first surface; a second semiconductor chip having a first electrode and a second electrode on a first surface and having a third electrode on a second surface that is opposite to the first surface; a first electrode plate bonded to the second electrode of the first semiconductor chip by a bonding material; a second electrode plate bonded to the third electrode of the second semiconductor chip by a bonding material; and a third electrode plate placed between the first semiconductor chip and the second semiconductor chip and having a first area sandwiched between the first semiconductor chip and the second semiconductor chip and a second area not sandwiched between the first semiconductor chip and the second semiconductor chip, wherein one surface of the first area of the third electrode plate is bonded to the second electrode of the second semiconductor chip by a bonding material, and another surface of the first area of the third electrode plate is bonded to the third electrode of the first semiconductor chip by a bonding material, and wherein in the third electrode plate, the first area is thinner than the second area.

A semiconductor device includes: a first semiconductor chip having a first electrode and a second electrode on a first surface and having a third electrode on a second surface that is opposite to the first surface; a second semiconductor chip having a first electrode and a second electrode on a first surface and having a third electrode on a second surface that is opposite to the first surface; a first electrode plate bonded to the second electrode of the first semiconductor chip by a bonding material; a second electrode plate bonded to the third electrode of the second semiconductor chip by a bonding material; and a third electrode plate placed between the first semiconductor chip and the second semiconductor chip and having a first area sandwiched between the first semiconductor chip and the second semiconductor chip and a second area not sandwiched between the first semiconductor chip and the second semiconductor chip, wherein one surface of the first area of the third electrode plate is bonded to the second electrode of the second semiconductor chip by a bonding material, and another surface of the first area of the third electrode plate is bonded to the third electrode of the first semiconductor chip by a bonding material, and wherein in the third electrode plate, the first area is thinner than the second area.

A bonded body according to an embodiment includes a substrate, a metal member, and a bonding layer. The bonding layer is provided between the substrate and the metal member. The bonding layer includes a first particle including carbon, a first region including a metal, and a second region including titanium. The second region is provided between the first particle and the first region. A concentration of titanium in the second region is greater than a concentration of titanium in the first region.

A bonded body according to an embodiment includes a substrate, a metal member, and a bonding layer. The bonding layer is provided between the substrate and the metal member. The bonding layer includes a first particle including carbon, a first region including a metal, and a second region including titanium. The second region is provided between the first particle and the first region. A concentration of titanium in the second region is greater than a concentration of titanium in the first region.

An embodiment of the present invention provides a method for producing a bonded object. The method comprises a step for preparing a laminate in which a first member, a copper bonding paste, and a second member are laminated in order and a step for sintering the copper bonding paste under a pressure of 0.1-1 MPa. The copper bonding paste contains metal particles and a dispersion medium, wherein the content of metal particles is at 50 mass % or more with respect to the total mass of the copper bonding paste, and the metal particles contain 95 mass % or more of submicro copper particles with respect to the total mass of the metal particles.

An embodiment of the present invention provides a method for producing a bonded object. The method comprises a step for preparing a laminate in which a first member, a copper bonding paste, and a second member are laminated in order and a step for sintering the copper bonding paste under a pressure of 0.1-1 MPa. The copper bonding paste contains metal particles and a dispersion medium, wherein the content of metal particles is at 50 mass % or more with respect to the total mass of the copper bonding paste, and the metal particles contain 95 mass % or more of submicro copper particles with respect to the total mass of the metal particles.

An electronic device includes a substrate, a first pad disposed on the substrate, a second pad disposed opposite to the first pad, and a conductive particle disposed between the first pad and the second pad. The first pad has a recess, and a part of the conductive particle sinks in the recess.

A package comprising a base is provided. An electrode and a concave portion are arranged on a first surface of the package. The base comprises a second surface on a side opposite to the first surface and a third surface. The first surface is positioned between the second and third surfaces. The electrode comprises an electrode upper surface and an electrode side surface. The concave portion comprises a concave side surface and a bottom surface positioned closer to the second surface than the concave side surface. The electrode upper surface is arranged at a position further away from the virtual plane than the bottom surface. The electrode side surface is continuous with the concave side surface. The concave portion further comprises a second side surface which faces the concave side surface and is continuous with the third surface.

A package comprising a base is provided. An electrode and a concave portion are arranged on a first surface of the package. The base comprises a second surface on a side opposite to the first surface and a third surface. The first surface is positioned between the second and third surfaces. The electrode comprises an electrode upper surface and an electrode side surface. The concave portion comprises a concave side surface and a bottom surface positioned closer to the second surface than the concave side surface. The electrode upper surface is arranged at a position further away from the virtual plane than the bottom surface. The electrode side surface is continuous with the concave side surface. The concave portion further comprises a second side surface which faces the concave side surface and is continuous with the third surface.

Disclosed herein are lids for integrated circuit (IC) packages with solder thermal interface materials (STIMs), as well as related methods and devices. For example, in some embodiments, an IC package may include a STIM between a die of the IC package and a lid of the IC package. The lid of the IC package may include nickel, the IC package may include an intermetallic compound (IMC) between the STIM and the nickel, and the lid may include an intermediate material between the nickel and the IMC.