A micro LED display manufacturing method according to various embodiments may include: a first operation of bonding an anisotropic conductive film including a plurality of conductive particles onto one surface of a prepared substrate, the one surface including a circuit part; a second operation of forming a bonding layer on the anisotropic conductive film; a third operation of positioning a plurality of micro LED chips above the bonding layer, the micro LED chips being arranged on a carrier substrate while being spaced a first distance apart from the substrate; a fourth operation of attaching the plurality of micro LED chips onto the bonding layer by means of laser transfer; and a fifth operation of forming a conductive structure for electrically connecting a connection pad to the circuit part through the conductive particles by means of heating and pressurizing.

Disclosed herein are lids for integrated circuit (IC) packages with solder thermal interface materials (STIMs), as well as related methods and devices. For example, in some embodiments, an IC package may include a STIM between a die of the IC package and a lid of the IC package. The lid of the IC package may include nickel, the IC package may include an intermetallic compound (IMC) between the STIM and the nickel, and the lid may include an intermediate material between the nickel and the IMC.

Disclosed herein are lids for integrated circuit (IC) packages with solder thermal interface materials (STIMs), as well as related methods and devices. For example, in some embodiments, an IC package may include a STIM between a die of the IC package and a lid of the IC package. The lid of the IC package may include nickel, the IC package may include an intermetallic compound (IMC) between the STIM and the nickel, and the lid may include an intermediate material between the nickel and the IMC.

Disclosed is a method for transient liquid-phase bonding between metal materials using a magnetic force. In particular, in the method, a magnetic force is applied to a transient liquid-phase bonding process, thereby shortening a transient liquid-phase bonding time between the metal materials, and obtaining high bonding strength. To this end, an attractive magnetic force is applied to a ferromagnetic base while a repulsive magnetic force is applied to a diamagnetic base, thereby to accelerate diffusion. This may reduce a bonding time during a transient liquid-phase bonding process between two bases and suppress formation of Kirkendall voids and voids and suppress a layered structure of an intermetallic compound, thereby to increase a bonding strength.

Disclosed is a method for transient liquid-phase bonding between metal materials using a magnetic force. In particular, in the method, a magnetic force is applied to a transient liquid-phase bonding process, thereby shortening a transient liquid-phase bonding time between the metal materials, and obtaining high bonding strength. To this end, an attractive magnetic force is applied to a ferromagnetic base while a repulsive magnetic force is applied to a diamagnetic base, thereby to accelerate diffusion. This may reduce a bonding time during a transient liquid-phase bonding process between two bases and suppress formation of Kirkendall voids and voids and suppress a layered structure of an intermetallic compound, thereby to increase a bonding strength.

In a semiconductor device, a first semiconductor chip and a second semiconductor chip are disposed between a first support member and a second support member. A first underlayer bonding material is disposed between the first semiconductor chip and the first support member. A second underlayer bonding material is disposed between the second semiconductor chip and the first support member. A first upper layer bonding material is disposed between the first semiconductor chip and the second support member. A second upper layer bonding material is disposed between the second semiconductor chip and the second support member.

In a semiconductor device, a first semiconductor chip and a second semiconductor chip are disposed between a first support member and a second support member. A first underlayer bonding material is disposed between the first semiconductor chip and the first support member. A second underlayer bonding material is disposed between the second semiconductor chip and the first support member. A first upper layer bonding material is disposed between the first semiconductor chip and the second support member. A second upper layer bonding material is disposed between the second semiconductor chip and the second support member.

A case includes a terminal disposition portion which includes a disposition surface projecting from an inner wall surface toward an open area, exposes an exposure region on a front surface of an external connecting terminal, and embeds therein a rear surface of the external connecting terminal. In the case, at at least part of both sides along a pair of opposite sides of the exposure region, the disposition surface is located between the front surface and the rear surface to have a level difference to the front surface. In a semiconductor device with the above-described configuration, the case does not extend to the exposure region on the front surface of the external connecting terminal. Therefore, no encapsulation resin flows into an interfacial debonding gap between the external connecting terminal and the case, thus curbing further advance of the interfacial debonding.

In a semiconductor device, a first outer edge of a conductive pattern is located between the outermost edge of a first dimple and the innermost edge of a second dimple in a cross-sectional view of the device. When thermal stress due to temperature changes in the semiconductor device is applied to the ceramic circuit board, the first and second dimples suppress deformation of the ceramic circuit board that is caused due to the temperature changes. As a result, cracks in the ceramic circuit board and separation of the metal plate and the conductive pattern are prevented.

In a semiconductor device, a first outer edge of a conductive pattern is located between the outermost edge of a first dimple and the innermost edge of a second dimple in a cross-sectional view of the device. When thermal stress due to temperature changes in the semiconductor device is applied to the ceramic circuit board, the first and second dimples suppress deformation of the ceramic circuit board that is caused due to the temperature changes. As a result, cracks in the ceramic circuit board and separation of the metal plate and the conductive pattern are prevented.