H01L2224/85186

Electrical coupling assemblies and methods for optoelectronic modules

In one example embodiment, a PCBA, an optoelectronic module, an electrical coupling, and/or a high speed interconnect may include a first contact pad, a second contact pad adjacent to and spaced apart from the first contact pad, a first wire coupled to the first contact pad via a first ball bump, and a second wire coupled to the second contact pad via a double ball bump.

Wire bonding tool including a wedge tool

A bonding tool includes a wedge tool that presses a bonding wire against a principal plane of a structure such as an electrode to which the bonding wire is to be bonded. A groove formed in an end portion of a wedge tool body of the wedge tool is inclined along a longitudinal direction of the bonding wire so that a heel side of the groove is closer to the principal plane of the structure than a toe side of the groove. As a result, the wedge tool is inclined at a tilt angle and the bonding wire fits the groove in the end portion of the wedge tool body along the longitudinal direction of the bonding wire. Thus, a corner portion of the wedge tool does not contact the electrode.

SEMICONDUCTOR DEVICE AND CORRESPONDING METHOD OF MANUFACTURE
20210305203 · 2021-09-30 · ·

Disclosed herein is a method, including attaching a semiconductor chip to a chip mounting portion on at least one leadframe portion, and attaching a passive component on a passive component mounting portion of the at least one leadframe portion. The method further includes forming a laser direct structuring (LDS) activatable molding material over the semiconductor chip, passive component, and the at least one leadframe portion. Desired patterns of structured areas are formed within the LDS activatable molding material by activating the LDS activatable molding material. The desired patterns of structured areas are metallized to form conductive areas within the LDS activatable molding material to thereby form electrical connection between the semiconductor chip and the passive component. A passivation layer is formed on the LDS activatable molding material.

Lead frame package having conductive surface with integral lead finger
10971434 · 2021-04-06 · ·

Disclosed is a device including a lead frame having a body with a top surface and a bottom surface and lead fingers. Each lead finger has a first end and a second end. A semiconductor die is coupled to the body. A first flag is a first exposed portion of the body and integral with the first end of a first lead finger. The first flag and the first lead finger are a continuous material. A second flag is a second exposed portion of the body and integral with the first end of a second lead finger. The second flag and the second lead finger are a continuous material. An encapsulant covers the die, the bottom surface of the body, the first end of the lead fingers and a portion of the top surface of the body. The flags are separated and electrically isolated from one another by the encapsulant.

Semiconductor Device
20210050285 · 2021-02-18 ·

A semiconductor device includes: a semiconductor element; an element conductor having an element mounting surface on which the semiconductor element is mounted; a connection conductor that is arranged apart from the element conductor and has a connection surface on an upper part thereof; a connecting line connecting the semiconductor element and the connection surface of the connection conductor; and an encapsulation resin that encapsulates the semiconductor element, the element conductor, the connection conductor, and the connecting line, wherein: a parasitic capacitance reducing structure is provided in at least one of facing side surfaces of the element conductor and of the connection conductor, the facing side surfaces being arranged to face each other.

IMAGING ELEMENT PACKAGE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICE

The present disclosure relates to an imaging element package, a method of manufacturing the same, and an electronic device capable of further improving reliability. An imaging element package includes a solid-state imaging element having a first pad, a substrate on which the solid-state imaging element is mounted, the substrate having a second pad, and a wire wiring that connects the first pad and the second pad. The wire wiring has a ball portion bonded to the first pad in a shape having a thickness equal to or larger than a depth of an opening portion provided for opening the first pad, and a crescent portion provided by pressing an end of the metal wire against the ball portion and bonding the end to the ball portion, and connected to the metal wire with a connection length of a predetermined ratio or more with respect to the metal wire.

LEAD FRAME PACKAGE HAVING CONDUCTIVE SURFACES
20210210418 · 2021-07-08 · ·

Disclosed is a device including a first finger of a plurality of lead fingers of a lead frame connected to a first flag. A second finger of the plurality of lead fingers of the lead frame is connected to a second flag. A semiconductor die is coupled to the lead frame. An encapsulant covers the semiconductor die, the lead frame, and a first end of the plurality of lead fingers, and excludes the first flag and the second flag. The first flag and the second flag are separated and electrically isolated from one another by the encapsulant.

WEDGE TOOL, BONDING DEVICE, AND BONDING INSPECTION METHOD
20200395333 · 2020-12-17 · ·

It is an object to enable a non-destructive inspection of reliability of a bonding part and enabling an accurate inspection. A wedge tool includes: a groove which is formed along a direction of an ultrasonic vibration in a tip portion and in which a bonding wire is disposed in a wedge bonding; a first planar surface and a second planar surface disposed on both sides of the groove; and at least one convex portion formed away from the groove in at least one of the first planar surface and the second planar surface, wherein the bonding wire comes in contact with the convex portion by a deformation of the bonding wire in a bonding part of the bonding wire and a bonded object bonded to each other by a wedge bonding.

CHIP PACKAGE STRUCTURE AND ELECTRONIC DEVICE
20200395285 · 2020-12-17 ·

A chip package structure and an electronic equipment may reduce probability of short circuit failure during chip packaging and improve chip reliability. The chip package structure includes: a chip, a substrate, and a lead; the chip is disposed above the substrate; wherein the chip includes a pin pad and a test metal key, and the lead is configured to electrically connect the pin pad and the substrate; the test metal key is disposed in an edge region of the chip that is not under the lead.

Compact wirebonding in stacked-chip system in package, and methods of making same

A bond-wire system including a wire bond that is deflected above a dielectric ridge at a die edge. The deflected wire bond allows for both a lowered Z-profile and a reduced X-Y footprint. The bond-wire system may include a stacked-die configuration where a stacked die is wire bonded and the stacked-die bond wire is deflected above a dielectric ridge at the stacked die edge.