Methods for modifying a spacer and/or spaces between spacers to enable a fin cut mask to be dropped between the spacers are provided. A first set of second mandrel structures having a first width is formed on facing sidewall surfaces of a neighboring pair of first mandrel structures and a second set of second mandrel structures having a second width less than the first width are formed on non-facing sidewall surfaces of the neighboring pair of first mandrel structures. Each first mandrel structure is removed and a spacer is formed on a sidewall surface of the first and second sets of second mandrel structures. In the region between the neighboring pair of first mandrel structure, a merged spacer is formed. The first and second sets of second mandrel structures are removed. A portion of an underlying substrate can be patterned utilizing each spacer and the merged spacer as etch masks.

A method for forming reliefs on the surface of a substrate, including a first implantation of ions in the substrate according to a first direction; a second implantation of ions in the substrate according to a second direction that is different from the first direction; at least one of the first and second implantations is carried out through at least one mask having at least one pattern; an etching of areas of the substrate having received by implantation a dose greater than or equal to a threshold, selectively to the areas of the substrate that have not received via implantation a dose greater than said threshold; the parameters of the first and second implantations being adjusted in such a way that only areas of the substrate that have been implanted both during the first implantation and during the second implantation receive a dose greater than or equal to said threshold.

A method of selectively removing NiPt material from a microelectronic substrate, the method comprising contacting the NiPt material with an aqueous etching composition comprising: an oxidising agent; a strong acid; and a source of chloride.

Some embodiments of the present disclosure provide a semiconductor structure, including a substrate and a regrowth region. The substrate is made of a first material with a first lattice constant, and the regrowth region is made of the first material and a second material, having a lattice constant different from the first lattice constant. The regrowth region is partially positioned in the substrate. The regrowth region has a “tip depth” measured vertically from a surface of the substrate to a widest vertex of the regrowth region, and the tip depth being less than 10 nm. The regrowth region further includes a top layer substantially made of the first material, and the top layer has substantially the first lattice constant.

A method for producing patterns in a layer to be etched, from a stack including at least the layer to be etched and a masking layer overlying the layer to be etched, with the masking layer having at least one pattern. The method includes modifying a first area of the layer to be etched by ion implantation through the masking layer; depositing a buffer layer to cover the pattern of the masking layer; modifying another area of the layer to be etched, different from the first area, by ion implantation through the buffer layer, to a depth of the layer to be etched greater than the implantation depth of the preceding step of modifying; removing the buffer layer; removing the masking layer; removing the modified areas by etching them selectively to the non-modified areas of the layer to be etched.

The present disclosure discloses a semiconductor device with C-shaped channel portion, a method of manufacturing the same, and an electronic apparatus including the same. According to the embodiments, the semiconductor device may comprise a channel portion on a substrate, the channel portion including two or more curved nanosheets or nanowires spaced apart from each other in a lateral direction relative to the substrate and each having a C-shaped cross section; source/drain portions respectively located at upper and lower ends of the channel portion relative to the substrate; and a gate stack surrounding an outer circumference of each nanosheet or nanowire in the channel portion.

In a method of manufacturing a semiconductor device, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. A source/drain region of the fin structure, which is not covered by the sacrificial gate structure, is etched, thereby forming a source/drain space. The first semiconductor layers are laterally etched through the source/drain space. An inner spacer made of a dielectric material is formed on an end of each of the etched first semiconductor layers. A source/drain epitaxial layer is formed in the source/drain space to cover the inner spacer. A lateral end of each of the first semiconductor layers has a V-shape cross section after the first semiconductor layers are laterally etched.

A method and processing system are provided for independent temperature and hydration control for an etching solution used for treating a wafer in process chamber. The method includes circulating the etching solution in a circulation loop, maintaining the etching solution at a hydration setpoint by adding or removing water from the etching solution, maintaining the etching solution at a temperature setpoint that is below the boiling point of the etching solution in the circulation loop, and dispensing the etching solution into the process chamber for treating the wafer. In one embodiment, the dispensing includes dispensing the etching solution into a processing region proximate the wafer in the process chamber, introducing steam into an exterior region that is removed from the wafer in the process chamber, and treating the wafer with the etching solution and the steam.

A semiconductor device has: a silicon (semiconductor) substrate; a gate insulating film and a gate electrode, which are formed on the silicon substrate in this order; and source/drain material layers formed in recesses (holes) in the silicon substrate, the recesses being located beside the gate electrode. Here, each of side surfaces of the recesses, which are closer to the gate electrode, is constituted of at least one crystal plane of the silicon substrate.

A substrate processing method includes forming a liquid film of an alkaline processing liquid on a substrate by supplying the alkaline processing liquid having a reduced oxygen concentration onto the substrate; and etching the substrate by rotating the substrate while supplying the alkaline processing liquid in a state that the liquid film having a given thickness is formed on the substrate.