A device for processing at least one semiconductor substrate. The device includes: a reactor with a wall which encloses a reaction chamber; a closing structure for loading the reaction chamber with at least one semiconductor substrate and for unloading the at least one semiconductor substrate from the reaction chamber and for hydrofluoric acid-tight closure of the reaction chamber; and a heating device designed to establish at least one specified temperature in at least one temperature range in the reaction chamber. The device further includes: a gas inlet designed to supply hydrofluoric acid in vapor form to the reaction chamber, and a gas outlet designed to remove hydrofluoric acid in vapor form from the reaction chamber; and a gas supply system which is coupled to the gas inlet and is designed to supply hydrofluoric acid in vapor form to the gas inlet at the specified temperature.

A resist underlayer film having an especially high dry etching rate; a composition for forming the resist underlayer film; a method for forming a resist pattern; and a method for producing a semiconductor device. The composition for forming the resist underlayer film has a solvent and a product of reaction between an epoxidized compound and a heterocyclic compound containing at least one moiety having reactivity with an epoxy group. It is preferable that the heteroring contained in the heterocyclic compound be selected from among furan, pyrrole, pyran, imidazole, pyrazole, oxazole, thiophene, thiazole, thiadiazole, imidazolidine, thiazolidine, imidazoline, dioxane, morpholine, diazine, thiazine, triazole, tetrazole, dioxolane, pyridazine, pyrimidine, pyrazine, piperidine, piperazine, indole, purine, quinoline, isoquinoline, quinuclidine, chromene, thianthrene, phenothiazine, phenoxazine, xanthene, acridine, phenazine, and carbazole.

A method for fabricating a semiconductor device includes forming a first mask layer on a substrate, forming an under layer on the first mask layer, forming a first photoresist pattern that includes tin on the under layer, converting at least a part of the first photoresist pattern into a second photoresist pattern including tin fluoride, through a plasma treatment process using fluorine element, etching the under layer using the second photoresist pattern as a first mask to form an under pattern, etching the first mask layer to form a first mask pattern, and etching at least a part of the substrate, using a mask pattern including the first mask pattern as a second mask.

A semiconductor device includes a substrate, a conductive layer, a nitride mask layer, a carbon mask layer and an anti-reflective coating stack. The conductive layer is disposed on the substrate. The nitride mask layer is disposed on the conductive layer, wherein the nitride mask layer has a first stress. The carbon mask layer is disposed on the nitride mask layer, wherein the carbon mask layer has a second stress and a difference between the second stress and the first stress is smaller than 200 MPa. The anti-reflective coating stack is disposed on the carbon mask layer.

An embodiment method includes forming a patterned etch mask over a target layer and patterning the target layer using the patterned etch mask as a mask to form a patterned target layer. The method further includes performing a first cleaning process on the patterned etch mask and the patterned target layer, the first cleaning process including a first solution. The method additionally includes performing a second cleaning process to remove the patterned etch mask and form an exposed patterned target layer, the second cleaning process including a second solution. The method also includes performing a third cleaning process on the exposed patterned target layer, and performing a fourth cleaning process on the exposed patterned target layer, the fourth cleaning process comprising the first solution.

A method includes etching a hybrid substrate to form a recess extending into the hybrid substrate. The hybrid substrate includes a first semiconductor layer having a first surface orientation, a dielectric layer over the first semiconductor layer, and a second semiconductor layer having a second surface orientation different from the first surface orientation. After the etching, a top surface of the first semiconductor layer is exposed to the recess. A spacer is formed on a sidewall of the recess. The spacer contacts a sidewall of the dielectric layer and a sidewall of the second semiconductor layer. An epitaxy is performed to grow an epitaxy semiconductor region from the first semiconductor layer. The spacer is removed.

A processing method of a wafer includes a resist film coating step of coating either one surface of a front surface and a back surface with a resist film containing an ultraviolet absorber, a laser beam irradiation step of irradiating the side of the one surface with a laser beam absorbed by the wafer and removing part of the wafer and the resist film along planned dividing lines, a plasma etching step of supplying a gas in a plasma state to the side of the one surface and removing an exposed region of the wafer exposed along the planned dividing lines through plasma etching, and a check step of irradiating plural positions on the side of the one surface of the wafer with ultraviolet rays and detecting light emission of the resist film to measure the thickness of the resist film and check a coating state of the resist film.

Provided are a hardmask composition including a polymer including a structural unit represented by Chemical Formula 1 and a structural unit represented by Chemical Formula 2, and a solvent, a hardmask layer manufactured from the hardmask composition, and a method of forming patterns from the hardmask composition, wherein the definitions of Chemical Formula 1 and Chemical Formula 2 are as described in the specification.

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A method for depositing, patterning and removing a layer of aluminum oxide as a masking material layer for performing a deep, high-aspect ratio etches into a substrate. The method comprising deposing a photoresist onto the substrate, performing lithography processing on the photoresist, developing the photoresist to pattern the photoresist into a mask design, depositing a thin-film layer of aluminum oxide; immersing the substrate into a solution to lift-off the aluminum oxide in regions where the aluminum oxide is deposited on top of the photoresist thereby leaving the patterned aluminum oxide layer on the substrate where no photoresist was present, performing deep reactive ion etching on the substrate wherein the hard masking material layer composed of aluminum oxide functions as a protective masking layer on the substrate to prevent etching from occurring where the aluminum oxide is present, and removing the aluminum oxide masking layer by immersion in a solution.

A fin field effect transistor device structure includes a fin structure formed over a substrate. The fin field effect transistor device structure also includes a source/drain epitaxial structure formed over the fin structure. The fin field effect transistor device structure also includes a contact structure with a concave top surface formed over the source/drain epitaxial structure. The fin field effect transistor device structure also includes a barrier layer conformally wrapped around the contact structure. The fin field effect transistor device structure also includes a via structure formed over the contact structure. The concave top surface of the contact structure is below the top surface of the barrier layer.