A circuit is formed on an SOI. The bias generator is connected to the gates of first and second transistors. In the bias generator, a first variable current source is connected to the power supply circuit via a power supply node. A third transistor is connected between the first variable current source and a ground-voltage source. A gate thereof is connected to the gate of the first transistor. A first operational amplifier controls a gate voltage of the third transistor so that a voltage at a second node between the first variable current source and the third transistor becomes almost equal to a reference-voltage. A first characteristics changer is connected to the gate of the third transistor or a second node, to change at least one loop gain characteristics and phase characteristics of a loop from the first operational amplifier, through the third transistor, to the first variable current source.

Devices and methods for forming a device are disclosed. A substrate is provided. A first body well of a second polarity type is formed in the substrate. A second body well of the second polarity type is formed in the first body well. A bottom of the second body well and a bottom of the first body well are contiguous. Dopant concentrations of the first and second body wells include a graded profile. A transistor of a first polarity type is formed over the substrate. The transistor includes a source and a drain. The source is formed in the second body well.

A driving thin-film transistor can include a substrate; a first active layer disposed on the substrate and including a first protruding portion; a second active layer overlapping with the first active layer and including a second protruding portion; a gate electrode disposed between the first active layer and the second active layer; a source electrode connected to the first protruding portion of the first active layer; and a drain electrode connected to the second protruding portion of the second active layer, in which the first protruding portion of the first active layer and the second protruding portion of the second active layer are located at different positions.

Provided is a thin film transistor, including: a base that includes, on an upper surface, a first region and a second region; a gate electrode that is provided on the first region of the base; a gate insulating film that is provided on a surface of the gate electrode and the second region of the base; and a semiconductor layer that is provided on a surface of the gate insulating film, wherein the semiconductor layer includes a third region and a fourth region, in the third region, the semiconductor layer and the gate electrode face with a minimum interval, in the fourth region, a distance from the semiconductor layer to the gate electrode is larger than the minimum interval, and at a boundary position between the third region and the fourth region, the semiconductor layer forms a linear shape or a substantially linear shape.

Devices and methods for forming a device are disclosed. A substrate is provided. A first body well of a second polarity type is formed in the substrate. A second body well of the second polarity type is formed in the first body well. A bottom of the second body well and a bottom of the first body well are contiguous. Dopant concentrations of the first and second body wells include a graded profile. A transistor of a first polarity type is formed over the substrate. The transistor includes a source and a drain. The source is formed in the second body well.

A semiconductor device according to the present disclosure includes an active region including a channel region and a source/drain region adjacent the channel region, a vertical stack of channel members over the channel region, a gate structure over and around the vertical stack of channel members, a bottom dielectric feature over the source/drain region, a source/drain feature over the bottom dielectric feature, and a germanium layer disposed between the bottom dielectric feature and the source/drain region.

Devices and methods for forming a device are disclosed. A substrate is provided. A first body well of a second polarity type is formed in the substrate. A second body well of the second polarity type is formed in the first body well. A bottom of the second body well and a bottom of the first body well are contiguous. Dopant concentrations of the first and second body wells include a graded profile. A transistor of a first polarity type is formed over the substrate. The transistor includes a source and a drain. The source is formed in the second body well.