Patent classifications
H01L29/7882
Nonvolatile memory device
A nonvolatile memory device can be manufactured without adding any major modification to a structure and component elements of a conventional MOS type silicon device, and is realized without deteriorating an electrical characteristic of an insulating-film/semiconductor interface and on the basis of a new operational principle. The nonvolatile memory device 10 is a capacitor configured by a metal electrode 16, two kinds of insulating films 13 and 15, and an interface structure of an insulating film 12/semiconductor 11, and has a MIS structure of providing a monolayer-level O-M.sub.1-O layer 14 to an insulating-film 13/semiconductor 15 interface. The nonvolatile memory device 10 realizes a nonvolatile information storage operation by changing strength or polarities of interface dipoles induced near the O-M.sub.1-O layer 14 through electrical stimulation applied from a gate electrode.
Methods and structures for a split gate memory cell structure
A method of forming a split gate memory cell structure using a substrate includes forming a gate stack comprising a select gate and a dielectric portion overlying the select gate. A charge storage layer is formed over the substrate including over the gate stack. A first sidewall spacer of conductive material is formed along a first sidewall of the gate stack extending past a top of the select gate. A second sidewall spacer of dielectric material is formed along the first sidewall on the first sidewall spacer. A portion of the first sidewall spacer is silicided using the second sidewall spacer as a mask whereby silicide does not extend to the charge storage layer.
Tight pitch vertical transistor EEPROM
A memory device including a first conductivity type vertically orientated semiconductor device in a first region of a substrate and a second conductivity type vertically orientated semiconductor device in a second region of the substrate. A common floating gate structure in simultaneous electrical communication with a first fin structure of the first conductivity type vertically orientated semiconductor device and a second fin structure of the second conductivity type vertically orientated semiconductor device.
NONVOLATILE MEMORY DEVICE
A nonvolatile memory device can be manufactured without adding any major modification to a structure and component elements of a conventional MOS type silicon device, and is realized without deteriorating an electrical characteristic of an insulating-film/semiconductor interface and on the basis of a new operational principle. The nonvolatile memory device 10 is a capacitor configured by a metal electrode 16, two kinds of insulating films 13 and 15, and an interface structure of an insulating film 12/semiconductor 11, and has a MIS structure of providing a monolayer-level O-M.sub.1-O layer 14 to an insulating-film 13/semiconductor 15 interface. The nonvolatile memory device 10 realizes a nonvolatile information storage operation by changing strength or polarities of interface dipoles induced near the O-M.sub.1-O layer 14 through electrical stimulation applied from a gate electrode.
TIGHT PITCH VERTICAL TRANSISTOR EEPROM
A memory device including a first conductivity type vertically orientated semiconductor device in a first region of a substrate and a second conductivity type vertically orientated semiconductor device in a second region of the substrate. A common floating gate structure in simultaneous electrical communication with a first fin structure of the first conductivity type vertically orientated semiconductor device and a second fin structure of the second conductivity type vertically orientated semiconductor device.