A semiconductor device includes a first electronic component, a second electronic component and a plurality of interconnection structures. The first electronic component has a first surface. The second electronic component is over the first electronic component, and the second electronic component has a second surface facing the first surface of the first electronic component. The interconnection structures are between and electrically connected to the first electronic component and the second electronic component, wherein each of the interconnection structures has a length along a first direction substantially parallel to the first surface and the second surface, a width along a second direction substantially parallel to the first surface and the second surface and substantially perpendicular to the first direction, and the length is larger than the width of at least one of the interconnection structures.

Semiconductor devices with underfill control features, and associated systems and methods. A representative system includes a substrate having a substrate surface and a cavity in the substrate surface, and a semiconductor device having a device surface facing toward the substrate surface. The semiconductor device further includes at least one circuit element electrically coupled to a conductive structure. The conductive structure is electrically connected to the substrate, and the semiconductor device further has a non-conductive material positioned adjacent the conductive structure and aligned with the cavity of the substrate. An underfill material is positioned between the substrate and the semiconductor device. In other embodiments, in addition to or in lieu of the con-conductive material, a first conductive structure is connected within the cavity, and a second conductive structure connected outside the cavity. The first conductive structure extends away from the device surface a greater distance than does the second conductive structure.

A display device includes: a substrate including: a display area; and a pad area including: an input pad area; an output pad area spaced apart from the input pad area in a first direction, and an intermediate area between the input pad area and the output pad area; and inorganic insulating layers defining a cutout portion in the intermediate area.

Integrated active-matrix multi-color light emitting pixel arrays based displays and methods of fabricating the integrated displays are provided. An example integrated device includes a backplane device and different color light emitting diodes (LEDs) devices arranged in different height planar layers on the backplane device. The backplane device includes at least one backplane having a number of pixel circuits. Each LED device includes an array of LEDs each operable to emit light with a particular color and conductively coupled to respective pixel circuits in the backplane to form active-matrix LED sub-pixels. The different color LED sub-pixels form an array of active-matrix multi-color display pixels. Plug vias can be arranged in different planar layers to conductively couple upper-level LEDs to respective pixel circuits in respective regions over the backplane device. The plug vias can extend from an upper planar layer into a lower planar layer to fix the two planar layers together.

An anisotropic conductive film that is capable of suppressing the occurrence of short circuit during anisotropic conductive connection of electrical components having decreased pitch, and suppressing a decrease in conduction reliability during storage under a high temperature and high humidity environment has a structure in which a conductive particle-containing layer containing conductive particles that are arranged in a single layer in a layered binder resin composition is layered on at least a first insulating resin composition layer. The lowest melt viscosity of the binder resin composition is equal to or higher than that of a first insulating resin composition. A second insulating resin composition layer is further layered on a surface of the conductive particle-containing layer on a side opposite to the first insulating resin composition layer. The lowest melt viscosity of the binder resin composition is higher than those of the first and second insulating resin compositions.

Semiconductor devices with underfill control features, and associated systems and methods. A representative system includes a substrate having a substrate surface and a cavity in the substrate surface, and a semiconductor device having a device surface facing toward the substrate surface. The semiconductor device further includes at least one circuit element electrically coupled to a conductive structure. The conductive structure is electrically connected to the substrate, and the semiconductor device further has a non-conductive material positioned adjacent the conductive structure and aligned with the cavity of the substrate. An underfill material is positioned between the substrate and the semiconductor device. In other embodiments, in addition to or in lieu of the con-conductive material, a first conductive structure is connected within the cavity, and a second conductive structure connected outside the cavity. The first conductive structure extends away from the device surface a greater distance than does the second conductive structure.

A method includes forming a conductive pad over an interconnect structure of a wafer, forming a capping layer over the conductive pad, forming a dielectric layer covering the capping layer, and etching the dielectric layer to form an opening in the dielectric layer. The capping layer is exposed to the opening. A wet-cleaning process is then performed on the wafer. During the wet-cleaning process, a top surface of the capping layer is exposed to a chemical solution used for performing the wet-cleaning process. The method further includes depositing a conductive diffusion barrier extending into the opening, and depositing a conductive material over the conductive diffusion barrier.

A display device includes: a substrate including a display area and a pad area, the pad area being located around the display area and adjacent to one side of the display area; a flexible printed circuit board disposed in the pad area on the substrate and including a first bump part and a plurality of test points connected to the first bump part; a driving integrated circuit disposed in the pad area on the substrate, spaced apart from the flexible printed circuit board and including a second bump part; a signal line disposed in the pad area on the substrate and connecting the first bump part and the second bump part; and a plurality of control parts disposed in the pad area on the substrate and connected to the signal line between the first bump part and the second bump part.

Disclosed are a micro light emitting diode display panel, a manufacturing method thereof and a display device. The embodiment micro light emitting diode display panel includes a first metal layer and a second metal layer; the first metal layer includes a source electrode, a drain electrode and a power line; the second metal layer includes a first bonding electrode and a second bonding electrode, and the first bonding electrode is electrically connected to the source electrode through the first via hole, and the second bonding electrode is electrically connected to the power line through the second via hole; the first via hole and the second via hole are both provided with a supporting column.

Integrated active-matrix multi-color light emitting pixel arrays based displays and methods of fabricating the integrated displays are provided. An example integrated device includes a backplane device and different color light emitting diodes (LEDs) devices arranged in different height planar layers on the backplane device. The backplane device includes at least one backplane having a number of pixel circuits. Each LED device includes an array of LEDs each operable to emit light with a particular color and conductively coupled to respective pixel circuits in the backplane to form active-matrix LED sub-pixels. The different color LED sub-pixels form an array of active-matrix multi-color display pixels. Plug vias can be arranged in different planar layers to conductively couple upper-level LEDs to respective pixel circuits in respective regions over the backplane device. The plug vias can extend from an upper planar layer into a lower planar layer to fix the two planar layers together.