A sensor package structure and a sensing module thereof are provided. The sensor package structure includes a substrate, a sensor chip disposed on the substrate, a light-curing layer disposed on the sensor chip, a light-permeable layer arranged above the sensor chip through the light-curing layer, and a shielding layer disposed on a surface of the light-permeable layer. The light-curing layer has an inner lateral side and an outer lateral side opposite to the inner lateral side, and the inner lateral side is separated from the outer lateral side by a first distance. In a transverse direction parallel to a top surface of the sensor chip, the outer lateral side is separated from an outer lateral edge by a second distance which is within a range of to of the first distance.

A first electronic element is disclosed, which includes: a first substrate having a first surface; a first electrode pad disposed on the first surface, wherein the first electrode pad has a second surface away from the first substrate; and an insulating layer disposed on the first surface, wherein the insulating layer includes an opening, the opening is disposed correspondingly to the first electrode pad, and the opening overlaps the first electrode pad in a normal direction of the first surface, wherein the insulating layer has a third surface away from the first substrate, a distance between the third surface and the second surface in the normal direction of the first surface is defined as a first distance, and the first distance is greater than 0 m and less than or equal to 14 m. In addition, the disclosure further provides an electronic device including the first electronic element.

A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.

Semiconductor devices with underfill control features, and associated systems and methods. A representative system includes a substrate having a substrate surface and a cavity in the substrate surface, and a semiconductor device having a device surface facing toward the substrate surface. The semiconductor device further includes at least one circuit element electrically coupled to a conductive structure. The conductive structure is electrically connected to the substrate, and the semiconductor device further has a non-conductive material positioned adjacent the conductive structure and aligned with the cavity of the substrate. An underfill material is positioned between the substrate and the semiconductor device. In other embodiments, in addition to or in lieu of the con-conductive material, a first conductive structure is connected within the cavity, and a second conductive structure connected outside the cavity. The first conductive structure extends away from the device surface a greater distance than does the second conductive structure.

Some embodiments relate to a three-dimensional (3D) integrated circuit (IC). The 3D IC includes a first IC die comprising a first semiconductor substrate, and a first interconnect structure over the first semiconductor substrate. The 3D IC also includes a second IC die comprising a second semiconductor substrate, and a second interconnect structure that separates the second semiconductor substrate from the first interconnect structure. A seal ring structure separates the first interconnect structure from the second interconnect structure and perimetrically surrounds a gas reservoir between the first IC die and second IC die. The seal ring structure includes a sidewall gas-vent opening structure configured to allow gas to pass between the gas reservoir and an ambient environment surrounding the 3D IC.

The present disclosure provides an image capturing assembly and its packaging method, a lens module and an electronic device. The packaging method includes: providing a photosensitive chip; mounting an optical filter on the photosensitive chip; providing a carrier substrate and temporarily bonding the photosensitive chip and functional components on the carrier substrate; and forming an encapsulation layer on the carrier substrate and at least between the photosensitive chip and the functional components.

A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, a cap layer, a conductive terminal, and a dam structure. The semiconductor die has a first surface. The cap layer is over the semiconductor die and has a second surface facing the first surface of the semiconductor die. The conductive terminal penetrates the cap layer and electrically connects to the semiconductor die. The dam structure is between the semiconductor die and the cap layer and surrounds a portion of the conductive terminal between the first surface and the second surface, thereby forming a gap between the cap layer and the semiconductor die.

A semiconductor package includes a substrate, a first semiconductor chip and a second semiconductor chip adjacent to each other on the substrate, and a plurality of bumps on lower surfaces of the first and second semiconductor chips. The first and second semiconductor chips have facing first side surfaces and second side surfaces opposite to the first side surfaces. The bumps are arranged at a higher density in first regions adjacent to the first side surfaces than in second regions adjacent to the second side surfaces.

An electronic assembly and methods of making the assembly are disclosed. The electronic assembly includes a substrate with an elastic member having an intrinsic stress profile. The elastic member has an anchor portion on the surface of the substrate; and a free end biased away from the substrate via the intrinsic stress profile to form an out of plane structure. The substrate includes one or more spacers on the substrate. The electronic assembly includes a chip comprising contact pads. The out of plane structure on the substrate touches corresponding contact pads on the chip, and the spacers on the substrate touch the chip forming a gap between the substrate and the chip.

A sensor package structure includes a substrate, a sensor chip disposed on the substrate, a light-curing layer disposed on the sensor chip, a light-permeable layer disposed on the light-curing layer, a shielding layer disposed on an inner surface of the light-permeable layer, a light filter layer arranged between the light-curing layer and the shielding layer, and a package body that is formed on the substrate. A projection region defined by orthogonally projecting the shielding layer onto a top surface of the sensor chip surrounds a sensing region of the sensor chip. The shielding layer has at least one light-permeable slot being covered by the light filter layer. The sensor chip, the light-curing layer, the light-permeable layer, the light filter layer, and the shielding layer are embedded in the package body that exposes at least part of the light-permeable layer.