A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.

A semiconductor device according to the present invention includes a semiconductor chip having a semiconductor layer that has a first surface on a die-bonding side, a second surface on the opposite side of the first surface, and an end surface extending in a direction crossing the first surface and the second surface, a first electrode that is formed on the first surface and has a peripheral edge at a position separated inward from the end surface, and a second electrode formed on the second surface, a conductive substrate onto which the semiconductor chip is die-bonded, a conductive spacer that has a planar area smaller than that of the first electrode and supports the semiconductor chip on the conductive substrate, and a resin package that seals at least the semiconductor chip and the conductive spacer.

An electronic device includes an electronic component (12), a sealing resin body (11) sealing the electronic component, and a plurality of conductive members electrically connected to the electronic component in the sealing resin body, including respective portions exposed from the sealing resin body to the outside of the sealing resin body, and having different potentials. The conductive members include an external connection terminal (14, 22, 23, 24, 25) extending from the inside of the sealing resin body to the outside of the sealing resin body. A surface of the external connection terminal has a connected part (40a) electrically connected to the electronic component, a higher adhesion part (43) having a higher adhesion to the sealing resin body, and a lower adhesion part (44) having an adhesion to the sealing resin body which is lower than that of the higher adhesion part. Each of the higher adhesion part and the lower adhesion part is a portion of the surface of the external connection terminal which is other than the connected part and covered with the sealing resin body. The lower adhesion part is provided in at least one of a connection surface (40) including the connected part and a back surface (41) opposite to the connection surface in a thickness direction to extend from an outer peripheral end of the sealing resin body along an extending direction of the external connection terminal.

A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.

At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a first substrate, an electrical component disposed on the first substrate, a second substrate disposed over the electrical component, an adhesive layer, a spacer, and an encapsulation layer. The adhesive layer is disposed between the electrical component and the second substrate. The spacer directly contacts both the adhesive layer and the second substrate. The encapsulation layer is disposed between the first substrate and the second substrate.

A semiconductor device according to the present invention includes a semiconductor chip having a semiconductor layer that has a first surface on a die-bonding side, a second surface on the opposite side of the first surface, and an end surface extending in a direction crossing the first surface and the second surface, a first electrode that is formed on the first surface and has a peripheral edge at a position separated inward from the end surface, and a second electrode formed on the second surface, a conductive substrate onto which the semiconductor chip is die-bonded, a conductive spacer that has a planar area smaller than that of the first electrode and supports the semiconductor chip on the conductive substrate, and a resin package that seals at least the semiconductor chip and the conductive spacer.

A semiconductor device according to the present invention incudes a semiconductor chip, a conductive member for supporting the semiconductor chip, a joint material provided between the conductive member and the semiconductor chip, and a release groove formed on the surface of the conductive member and arranged away from the semiconductor chip with the one end and the other end of the release groove connected to the peripheral edges of the conductive member, respectively.

Disclosed is a method of coating a conductive substrate with an adhesive, wherein the amounts and positions of conductive and non-conductive adhesives for bonding a plurality of circuit elements to the conductive substrate are set, thus preventing the spread of the adhesive from causing defects, including a poor aesthetic appearance, low electrical conductivity, and short circuits.

A method for manufacturing a cover for an electronic package includes placing an electrically conductive insert (including an electrical contact surface) inside a cavity of a mold in a position such that the electrical contact surface is in contact with a face of the cavity of the mold. A coating material is injected into said cavity and set so as to produce a substrate that is overmolded around the insert and forms the cover where the electrical contact surface of the overmolded substrate is not covered by the coating material. An electronic package is then formed from a chip mounted on a carrier substrate that is covered by the cover. The electrical contact surface is located above and electrically connected to an electrical connection pad of either the chip or the carrier substrate.

A semiconductor device according to the present invention includes a semiconductor chip, a conductive member for supporting the semiconductor chip, a joint material provided between the conductive member and the semiconductor chip, and a release groove formed on the surface of the conductive member and arranged away from the semiconductor chip with the one end and the other end of the release groove connected to the peripheral edges of the conductive member, respectively.