Patent classifications
H01L2224/29101
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
It is an object to provide technology enabling suppression of contact deformation of pin fins during assembly of a semiconductor device and the like. A semiconductor device includes a base plate, a semiconductor element, and a resin member. The base plate has a plurality of pin fins on a lower surface thereof. The semiconductor element is mounted on an upper side of the base plate. The resin member covers at least a side surface of the semiconductor element. The resin member has a rib covering a side surface of the base plate, and a lower end of the rib is located below lower ends of the plurality of pin fins.
Electronic device and method for manufacturing the same
An electronic device includes a support member and a mount member mounting on the support member. The support member and the mount member are sealed by a resin member. The support member includes a surface having a laser irradiation mark. The mount member includes a surface having a rough portion with an accumulation of material of the support member.
Electronic device and method for manufacturing the same
An electronic device includes a support member and a mount member mounting on the support member. The support member and the mount member are sealed by a resin member. The support member includes a surface having a laser irradiation mark. The mount member includes a surface having a rough portion with an accumulation of material of the support member.
Integrated multiple-path power amplifier
A multiple-path amplifier (e.g., a Doherty amplifier) includes first and second transistors (e.g., main and peaking transistors) with first and second output terminals, respectively, all of which is integrally-formed with a semiconductor die. A signal path through the second transistor extends in a direction from a control terminal of the second transistor to the second output terminal, where the second output terminal corresponds to or is closely electrically coupled to a combining node. The amplifier also includes an integrated phase delay circuit that is configured to apply an overall phase delay (e.g., 90 degrees) to a signal carried between the first and second output terminals. The integrated phase delay circuit includes delay circuit wirebonds coupled between the first and second output terminals, and the delay circuit wirebonds extend in a third direction that is angularly offset from (e.g., perpendicular to) the second direction.
Integrated multiple-path power amplifier
A multiple-path amplifier (e.g., a Doherty amplifier) includes first and second transistors (e.g., main and peaking transistors) with first and second output terminals, respectively, all of which is integrally-formed with a semiconductor die. A signal path through the second transistor extends in a direction from a control terminal of the second transistor to the second output terminal, where the second output terminal corresponds to or is closely electrically coupled to a combining node. The amplifier also includes an integrated phase delay circuit that is configured to apply an overall phase delay (e.g., 90 degrees) to a signal carried between the first and second output terminals. The integrated phase delay circuit includes delay circuit wirebonds coupled between the first and second output terminals, and the delay circuit wirebonds extend in a third direction that is angularly offset from (e.g., perpendicular to) the second direction.
Semiconductor device package assemblies and methods of manufacture
In one general aspect, a semiconductor device package can include a die attach paddle having a first surface and a second surface that is opposite the first surface. The package can also include a semiconductor die coupled with the first surface of the die attach paddle. The package can further include a direct-bonded-metal (DBM) substrate. The DBM substrate can include a ceramic layer having a first surface and a second surface that is opposite the first surface; a first metal layer disposed on the first surface of the ceramic layer and coupled with the second surface of the die attach paddle; and a second metal layer disposed on the second surface of the ceramic layer. The second metal layer can be exposed external to the semiconductor device package. The second metal layer can be electrically isolated from the first metal layer by the ceramic layer.
Semiconductor device package assemblies and methods of manufacture
In one general aspect, a semiconductor device package can include a die attach paddle having a first surface and a second surface that is opposite the first surface. The package can also include a semiconductor die coupled with the first surface of the die attach paddle. The package can further include a direct-bonded-metal (DBM) substrate. The DBM substrate can include a ceramic layer having a first surface and a second surface that is opposite the first surface; a first metal layer disposed on the first surface of the ceramic layer and coupled with the second surface of the die attach paddle; and a second metal layer disposed on the second surface of the ceramic layer. The second metal layer can be exposed external to the semiconductor device package. The second metal layer can be electrically isolated from the first metal layer by the ceramic layer.
SEMICONDUCTOR DEVICE
A semiconductor device includes a first insulation member, a first drive conductive layer, a first semiconductor element, a second insulation member, a second drive conductive layer, a second semiconductor element, a connection member, and an encapsulation resin. The encapsulation resin encapsulates the first semiconductor element, the second semiconductor element, and the connection member. The connection member has a higher thermal conductivity than the encapsulation resin. The connection member forms a heat conduction path between the first insulation member and/or the first drive conductive layer and the second insulation member and/or the second drive conductive layer. The connection member has a higher thermal conductivity than the encapsulation resin.
SEMICONDUCTOR DEVICE
A semiconductor device includes a first insulation member, a first drive conductive layer, a first semiconductor element, a second insulation member, a second drive conductive layer, a second semiconductor element, a connection member, and an encapsulation resin. The encapsulation resin encapsulates the first semiconductor element, the second semiconductor element, and the connection member. The connection member has a higher thermal conductivity than the encapsulation resin. The connection member forms a heat conduction path between the first insulation member and/or the first drive conductive layer and the second insulation member and/or the second drive conductive layer. The connection member has a higher thermal conductivity than the encapsulation resin.
INTERDIGITATED OUTWARD AND INWARD BENT LEADS FOR PACKAGED ELECTRONIC DEVICE
An electronic device includes a package structure, a first lead and a second lead. The first lead has a first portion extending outward from a side of the package structure and downward, and a second portion extending outward from the first portion away from the package side. The second lead has a first portion extending outward from the package side and downward, and a second portion extending inward from the first portion toward the package side, and a distal end of the second lead is spaced from the package side.