A semiconductor device includes a substrate, a semiconductor element and a tin-based solder layer. The semiconductor element faces the substrate in a normal direction of the substrate. The normal direction corresponds to a normal line of the substrate. The tin-based solder layer joins the semiconductor element to the substrate. The tin-based solder layer a central portion and a peripheral portion surrounding the central portion. The tin-based solder layer has a tin crystal with a C-axis at each of the central portion and the peripheral portion. The C-axis at the central portion intersects the normal line at an angle larger than 45 degrees with respect to the normal line. The C-axis at the peripheral portion either intersects the normal line at an angle smaller than or equal to 45 degrees with respect to the normal line, or is parallel to the normal line.

A semiconductor package includes a first semiconductor chip, a second semiconductor chip on the first semiconductor chip, a first semiconductor structure and a second semiconductor structure that are on the first semiconductor chip and spaced apart from each other across the second semiconductor chip, and a resin-containing member between the second semiconductor chip and the first semiconductor structure and between the second semiconductor chip and the second semiconductor structure. The semiconductor package may be fabricated at a wafer level.

An apparatus (100) including multiple biological chips (110,120) includes a substrate (101), a first adhesive layer (134) disposed on the substrate (101), a first biological chip (110) and a second biological chip (120) disposed on the first adhesive layer (134) and attached to the substrate (101) by the adhesive layer (134). The apparatus (100) further includes a filler (130) disposed between the first biological chip (110) and the second biological chip (120). The filler (130) includes a second adhesive layer (135) extending between a side surface (114) of the first biological chip (110) and a side surface (124) of the second biological chip (120), the second adhesive layer (135) attaching the first biological chip (110) to the second biological chip (120). The filler (130) also includes a surface layer (132) disposed over the second adhesive layer (135). The surface layer (132) has a hydrophobic surface that is co-planar with a top surface (111) of the first biological chip (110) and a top surface (121) of the second biological chip (120).

Described herein are methods of manufacturing dual-sided packaged electronic modules to control the distribution of an under-fill material between one or more components and a packaging substrate. The disclosed technologies include using a dam on a packaging substrate that is configured to prevent or limit the flow of a capillary under-fill material. This can prevent or limit the capillary under-fill material from flowing onto or contacting other components or elements on the packaging substrate, such as solder balls of a ball-grid array. Accordingly, the disclosed technologies control under-fill for dual-sided ball grid array packages using a dam on a packaging substrate.

An electronic device includes a substrate, and a stack of dies stacked on the substrate. The stack includes (i) multiple dies stacked on one another, the multiple dies include electronic components and interconnections, and (ii) one or more heat pipes (HPs), which are traversing at least a subset of the dies at a right angle relative to the substrate, at least one of the HPs being configured to dissipate heat generated by operation of the electronic components away from at least the subset of the dies.

A semiconductor package includes a semiconductor substrate, a plurality of first dies, a plurality of thermal conductive patterns and an interposer. The first dies are bonded to the semiconductor substrate. The thermal conductive patterns are bonded to the semiconductor substrate. The interposer is bonded to the first dies, and the first dies and the thermal conductive patterns are disposed between the semiconductor substrate and the interposer.

Disclosed herein are methods of fabricating a packaged radio-frequency (RF) device. The disclosed methods use an encapsulant on solder balls in combination with a dam or a trench to control the distribution of an under-fill material between one or more components and a packaging substrate. The encapsulant can be used in the ball attach process. The fluxing agent leaves behind a material that encapsulates the base of each solder ball. The encapsulant reduces the tendency of the under-fill material to wick around the solder balls by capillary action which can prevent or limit the capillary under-fill material from flowing onto or contacting other components. The dam or trench aids in retaining the under-fill material within a keep out zone to prevent or limit the under-fill material from contacting other components.

The present disclosure relates to a semiconductor chip that allows electrical connections to be protected and a manufacturing method therefor.

A semiconductor chip has a strip-shaped region including a plurality of recesses on a side surface thereof. The recesses are arranged in a matrix of rows and columns on the side surface of the semiconductor chip or in a zig-zag pattern in the region. At least two of the strip-shaped regions are formed. The strip-shaped regions are formed in different positions between the vicinity of the center and opposed ends of the side surface. The strip-shaped region is partly inclined. The present disclosure can be applied for example to a semiconductor chip for a semiconductor device in which connections for electrically connecting the semiconductor chip and the substrate are protected with underfill.

A display device includes: a display layer on a substrate, the display layer including a light emitting element; a reflective structure on the display layer; a resin part on the display layer; a cover part on the resin part; and a driving circuit board, at least a portion of the driving circuit board being on a side of the display layer. The reflective structure includes a reflective surface facing the at least the portion of the driving circuit board.

A semiconductor device, including a first conductive portion including a first conducting region and a first wiring region communicating with the first conducting region via a first communicating portion, a second conductive portion including a second conducting region and a second wiring region that communicates with the second conducting region via a second communicating portion and that faces the first wiring region with a prescribed space therebetween, and a wiring member electrically connecting the first wiring region and the second wiring region in a wiring direction. The first communicating portion and the second communicating portion are separate from each other when viewed from the wiring direction.