H01L21/3085

SEMICONDUCTOR DEVICE AND MANUFACTURING METHODS THEREOF
20230010146 · 2023-01-12 ·

Epitaxial regions may be formed in specific locations on a semiconductor wafer with specific asymmetric properties such as slope or tilt direction, slope or tilt angle, and/or other asymmetric properties. The asymmetric epitaxial regions may be formed using various plasma-based fin structure etching techniques described herein. The specific asymmetric properties may increase metal landing coverage areas in particular locations on the semiconductor wafer (e.g., that are optimized for particular locations on the semiconductor substrate) to reduce the contact resistance between the epitaxial regions and associated conductive structures that are formed to the epitaxial regions. This increases semiconductor device performance, decreases the rate and/or likelihood of defect formation, and/or increases semiconductor device yield, among other examples.

PLASMA ETCHED SILICON CARBIDE
20230215732 · 2023-07-06 ·

A method of plasma etching a compound semiconductor substrate forms a feature. A first plasma etch step anisotropically etches the substrate through an opening to produce a partially formed feature having an opening and a bottom surface with a peripheral region. A second plasma etch step removes a region of the mask adjacent to the opening of the partially formed feature thereby causing rounding of the edges of the substrate at the opening of the partially formed feature. A third plasma etch step anisotropically etches the bottom surface of the partially formed feature through the opening of the mask while depositing a passivation material onto the mask and the opening of the partially formed feature to reduce a dimension of the opening of the partially formed feature. A plasma etch apparatus can be used to perform the method.

MASK ENCAPSULATION TO PREVENT DEGRADATION DURING FABRICATION OF HIGH ASPECT RATIO FEATURES
20220406610 · 2022-12-22 ·

A tool and method for processing substrates by encapsulating a mask to protect from degradation during an etch-back to prevent a feature liner material from pinching off an opening during deposition-etch cycles used to fabricate high aspect ratio features with very tight critical dimension control.

Self-Aligned Double Patterning
20220384201 · 2022-12-01 ·

A method includes patterning a mandrel layer over a target layer to form first mandrels and second mandrels, the first mandrels having a larger width than the second mandrels. A spacer layer is formed over the first mandrels and the second mandrels, and altered so that a thickness of the spacer layer over the first mandrels is greater than a thickness of the spacer layer over the second mandrels. Spacers are formed from the spacer layer which have a greater width adjacent the first mandrels than the spacers which are adjacent the second mandrels. The spacers are used to etch a target layer.

METHOD OF CUTTING FIN

A method of cutting fins includes the following steps. A photomask including a snake-shape pattern is provided. A photoresist layer is formed over fins on a substrate. A photoresist pattern in the photoresist layer corresponding to the snake-shape pattern is formed by exposing and developing. The fins are cut by transferring the photoresist pattern and etching cut parts of the fins.

FUSE STRUCTURE AND METHOD FOR MANUFACTURING SAME
20220375858 · 2022-11-24 ·

A fuse structure and a method for manufacturing the same are provided. The fuse structure includes a substrate; a fin, located on the substrate and including a first fin region; and a gate stack structure, surrounding the top and side walls of the first fin region. The gate stack structure includes a first gate stack and a second gate stack. The first gate stack covers the first fin region, the second gate stack covers the first gate stack. The first gate stack is configured to receive a first gate voltage, the second gate stack is configured to receive a second gate voltage, and the first gate voltage is greater than the second gate voltage. The fuse structure reduces the area of the fuse unit and increase the integration level of the fuse circuit.

METHODS FOR PROCESSING SEMICONDUCTOR STRUCTURES AND METHODS FOR FORMING SEMICONDUCTOR STRUCTURES
20230053945 · 2023-02-23 ·

Embodiments of the present application provide a method for processing a semiconductor structure and a method for forming a semiconductor structure. The method for processing a semiconductor structure includes: providing a semiconductor substrate, the semiconductor substrate being provided with a feature portion, the aspect ratio of the feature portion being greater than a preset aspect ratio, a mask layer being provided on the top of the feature portion; ashing a semiconductor structure, the semiconductor structure comprising the semiconductor substrate, the feature portion, and the mask layer; cleaning the semiconductor structure; drying the semiconductor structure; and removing the mask layer.

Semiconductor device and method for manufacturing the same

A semiconductor device includes a semiconductor substrate, a pair of source/drain regions on the semiconductor substrate, and a gate structure on the semiconductor substrate and between the pair of source/drain regions. The gate structure includes a first metal layer and a second metal layer in contact with the first metal layer. A sidewall of the first metal layer and a top surface of the semiconductor substrate form a first included angle, a sidewall of the second metal layer and the top surface of the semiconductor substrate form a second included angle. The second included angle is different from the first included angle.

Angled Etch For Surface Smoothing
20220359217 · 2022-11-10 ·

Methods of processing a feature on a semiconductor workpiece are disclosed. The method is performed after features have been created on the workpiece. An etching species may be directed toward the workpiece at a non-zero tilt angle. In certain embodiments, the tilt angle may be 30° or more. Further, the etching species may also be directed with a non-zero twist angle. In certain embodiments, the etching species may sputter material from the features, while in other embodiments, the etching species may be a chemically reactive species. By adjusting the tilt and twist angles, as well as the flow rate of the etching species and the exposure time, the LER and LWR of a feature may be reduced with minimal impact of the CD of the feature.

Alternating hardmasks for tight-pitch line formation

A method for forming fins includes forming a three-color hardmask fin pattern on a fin base layer. The three-color hardmask fin pattern includes hardmask fins of three mutually selectively etchable compositions. Some of the fins of the first color are etched away with a selective etch that does not remove fins of a second color or a third color and that leaves at least one fin of the first color behind. The fins of the second color are etched away. Fins are etched into the fin base layer by anisotropically etching around remaining fins of the first color and fins of the third color.