First lithography and etching are carried out on a semiconductor structure to provide a first intermediate semiconductor structure having a first set of surface features corresponding to a first portion of desired fin formation mandrels. Second lithography and etching are carried out on the first intermediate structure, using a second mask, to provide a second intermediate semiconductor structure having a second set of surface features corresponding to a second portion of the mandrels. The second set of surface features are unequally spaced from the first set of surface features and/or the features have different pitch. The fin formation mandrels are formed in the second intermediate semiconductor structure using the first and second sets of surface features; spacer material is deposited over the mandrels and is etched back to form a third intermediate semiconductor structure having a fin pattern. Etching is carried out on same to produce the fin pattern.

An initial semiconductor structure includes an underlying substrate, a hard mask stack, an organic planarization layer (OPL), a first complementary material, and a patterned photoresist layer patterned into a plurality of photoresist pillars defining a plurality of photoresist trenches. The first material is partially etched inward of the trenches, to provide trench regions, and the photoresist is removed. The trench regions are filled with a second complementary material, preferentially etchable with respect to the first material. A polymer brush is grafted on the second material but not the first material, to form polymer brush regions with intermediate regions not covered by the brush. The first material is anisotropically etched the at the intermediate regions but not the brush regions. The OPL is etched inward of the intermediate regions, to provide a plurality of OPL pillars defining a plurality of OPL trenches inverted with respect to the photoresist pillars.

A method for forming a patterned mask layer is provided. The method includes forming a first layer over a substrate. The method includes forming a first strip structure and a second strip structure over the first layer. The method includes forming a spacer layer conformally covering the first strip structure, the second strip structure, and the first layer. The method includes forming a block structure in the first trench. The method includes removing a first portion of the spacer layer, which is under the first trench and not covered by the block structure, and a second portion of the spacer layer, which is over the first strip structure and the second strip structure. The method includes forming a third strip structure in the second trench and the third trench. The method includes removing the block structure. The method includes removing the spacer layer.

A method of forming semiconductor device, including forming a first protective strip and a second protective strip on a semiconductor substrate. The first protective strip and the second protective strip extend in a first direction and are alternately arranged in a second direction perpendicular to the first direction. The first protective strip and the second protective strip are spaced apart from each other. The first protective strip is cut by selectively removing a portion of the first protective strip. The second protective strip is cut by selectively removing a portion of the second protective strip. The semiconductor substrate is etched to form an isolation trench. Remaining portions of the first and second protective strips are removed. An isolation feature is filled into the isolation trench. The isolation feature defines a plurality of strip-shaped active regions. Capacitor contacts are formed on both ends of each of the strip-shaped active regions.

The present description concerns a method of forming a cavity in a substrate comprising: the forming of an etch mask comprising, opposite the location of the cavity, a plurality of sets of openings, the ratio between the openings and the mask of each set being selected according to the desired profile of the cavity opposite the surface of the mask having the set inscribed therein; and the wet etching of the substrate through the openings.

Disclosed are semiconductor devices and methods of fabricating the same. The method comprises sequentially stacking a lower sacrificial layer and an upper sacrificial layer on a substrate, patterning the upper sacrificial layer to form a first upper sacrificial pattern and a second upper sacrificial pattern, forming a first upper spacer and a second upper spacer on sidewalls of the first upper sacrificial pattern and a second upper sacrificial pattern, respectively, using the first and second upper spacers as an etching mask to pattern the lower sacrificial layer to form a plurality of lower sacrificial patterns, forming a plurality of lower spacers on sidewalls of the lower sacrificial patterns, and using the lower spacers as an etching mask to pattern the substrate. The first and second upper spacers are connected to each other.

A method for preparing a semiconductor device is provided. The method for preparing the semiconductor device includes: providing a substrate, and forming a first dielectric layer on one side of the substrate, where the substrate includes an array area and a peripheral area arranged outside of the array area; forming an initial mask pattern on one side of the first dielectric layer away from the substrate; performing at least two patterning processes on the initial mask pattern, to form a first mask pattern in the array area and to form a second mask pattern in the peripheral area. The first mask pattern has a first height, the second mask pattern has a second height, and the second height is greater than the first height. Both of the array area and the peripheral area are exposed by using each of the at least two patterning processes.

A manufacturing method of a semiconductor device includes forming a hard mask layer and a photoresist on a substrate having a layer to be etched, and performing exposure and development such that the patterned photoresist has first trenches and to expose the hard mask layer, wherein ends of the first trenches have a width gradually decreased toward an end point. The exposed hard mask layer is removed using the patterned photoresist to transfer the pattern of the first trenches to the hard mask layer such that the patterned hard mask layer has second trenches, and the ends of the second trenches have a width gradually decreased toward an end point. Spacers are formed on inner walls of the second trenches. The hard mask layer is removed such that the layer to be etched is exposed. The exposed layer to be etched is removed using the spacers as an etch mask.

A first mask material layer on a Si pillar 7a and a first material layer around a side surface of a top portion of the Si pillar 7a are formed. A second material layer is then formed on an outer periphery of the first material layer. The first mask material layer and the first material layer are then etched by using the second material layer as a mask. A thin SiGe layer, a p.sup.+ layer 23a, and a SiO.sub.2 layer 24a are then formed in a recessed portion formed around the Si pillar 7a. The exposed side surface of the thin SiGe layer is oxidized to form a SiO.sub.2 layer 26a. A TiN layer and a W layer, which are gate conductor layers, are etched by using the SiO.sub.2 layers 24a and 26a as masks to form a TiN layer 29a and a W layer 30a. In plan view, the Si pillar 7a, the p.sup.+ layer 23a with a small diode junction resistance, and the TiN layer 29a and the W layer 30a, which are gate line conductor layers, thus have a self-alignment relationship, and the p.sup.+ layer 23a and the TiN layer 29a are self-aligned with each other with the HfO.sub.2 layer 28 and the SiO.sub.2 layer 26a therebetween in the vertical direction.

A structure is manufactured by forming a mask that has an opening pattern on a surface of a substrate, etching the surface of the substrate with the mask to form a recessed portion corresponding to the opening pattern of the mask, forming a thin film including aluminum on a bottom surface of the recessed portion in a state where the mask remains, treating the thin film including aluminum with hot water to change the thin film into a fine recessed and projected layer including alumina hydrate smaller than the recessed portion, etching the bottom surface of the recessed portion, on which the fine recessed and projected layer is formed, in a state where the mask remains to form a fine recessed and projected structure on the bottom surface of the recessed portion, and thereafter removing the mask and the fine recessed and projected structure, which remains after the etching step.