An array substrate, a method for fabricating the same, a display panel and a display device are disclosed. The array substrate comprises a display area and a non-display area that is outside the display area. The method comprises: forming a metal layer on a base substrate, the metal layer comprising a conductive pattern in the display area and a first electrode in the non-display area; forming a protective layer on the metal layer, a thickness of the protection layer in the non-display area being less than a thickness of the protection layer in the display area; forming a display electrode layer on the protection layer and removing the display electrode layer in the non-display area; and removing the protection layer in the non-display area.

A film patterning method is provided. The method comprises: performing a dry etching process on a film to be patterned, so as to form a patterned film; removing a suspended particle on the patterned film; and performing another dry etching process on the patterned film after the suspended particle is removed, to form a final pattern of the film. By moving or completely removing the suspended particle on the patterned film and then performing another dry etching process on the patterned film to etch away the etching residue, existence of the etching residue is completely avoided in the final pattern of the film, so that the product yield is improved and the product quality is ensured.

[Summary] [Problem] A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high. [Solving Means] By performing the formation of the pixel electrode 127, the source region 123 and the drain region 124 by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized.

An array substrate of an X-ray sensor and a method for manufacturing the same are provided, the method comprising a step of forming a thin-film transistor element and a photodiode sensor element, wherein the step of forming the thin-film transistor element comprises: forming a gate electrode on an base substrate by a mask process; depositing a gate insulating layer on the base substrate on which the gate electrode is formed; the step of forming the photodiode sensor element comprises: forming an ohmic contact layer on the base substrate through the same mask process while forming the gate electrode; forming a semiconductor layer and a transparent electrode through a mask process on the substrate on which the ohmic contact layer is formed; depositing the gate insulating layer on the base substrate on which the semiconductor layer and the transparent electrode are formed while depositing the gate insulating layer on the base substrate on which the gate electrode is formed. A gate pattern and an ohmic contact layer are formed through the same mask process, and a passivation layer substitutes a channel blocking layer to reduce the number of the mask processes and simplify the manufacturing process and improve throughput and yield of the product.

A GaN transistor with polysilicon layers for creating additional components for an integrated circuit and a method for manufacturing the same. The GaN device includes an EPI structure and an insulating material disposed over EPI structure. Furthermore, one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions. The device further includes metal interconnects disposed on the insulating material and vias disposed in the insulating material layer that connect source and drain metals to the n-type and p-type regions of the polysilicon layer.

The present invention provides an amorphous silicon thin film transistor and a manufacturing method of the amorphous silicon thin film transistor, which comprise: a substrate, a gate electrode layer, a gate insulating layer, an active layer, a source/drain electrode layer, an N+-doped layer, a protective insulating layer, and a passivation layer. The N+-doped layer is disposed between the active layer and the source/drain electrode layer. The protective insulating layer is disposed on the source/drain electrode layer. A channel is formed in the source/drain electrode layer and penetrates the N+-doped layer and the protective insulating layer. The passivation layer covers the channel and the protective insulating layer. The protective insulating layer and the source/drain electrode layer are flush with each other in the channel.

An organic light-emitting display apparatus includes a substrate, an active layer of a thin film transistor formed over the substrate, a gate insulating layer formed over the active layer, a gate electrode of the thin film transistor formed over the gate insulating layer, an interlayer insulating layer formed over the gate electrode and the first electrode, a source electrode and a drain electrode formed over the interlayer insulating layer, a pixel electrode including a first region in direct contact with an upper surface of the interlayer insulating layer and a second region in direct contact with an upper surface of one of the source electrode and the drain electrode, a pixel defining layer covering the source and drain electrodes and including an opening which exposes the first region of the pixel electrode in an area that does not overlap the thin film transistor.

A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.

The present application discloses a thin film transistor. The thin film transistor includes a base substrate; an active layer; an etch stop layer on a side of the active layer distal to the base substrate; and a source electrode and a drain electrode on a side of the etch stop layer distal to the active layer. The active layer includes a channel region, a source electrode contact region, and a drain electrode contact region. An orthographic projection of the etch stop layer on the base substrate surrounds an orthographic projection of the drain electrode contact region on the base substrate. An orthographic projection of the source electrode contact region on the base substrate at least partially peripherally surrounding the orthographic projection of the etch stop layer on the base substrate.

The thin film transistor includes a first insulating layer provided on a substrate; a source electrode and a drain electrode that are provided on the first insulating layer; a semiconductor layer provided so as to cover the first insulating layer, the source electrode, and the drain electrode; a second insulating layer provided on the semiconductor layer; and a gate electrode provided on the second insulating layer, in which the first insulating layer is formed of a hydrophilic/hydrophobic material and has a recess portion, and the source electrode and the drain electrode are provided so as to fill the recess portion of the first insulating layer.