A method is provided for localised deposition of a material over an element, including deposition of a portion of the material over a portion of a surface of a support; positioning of a portion of the element against the portion of the material; annealing of the material portion increasing, at the end of the treatment, the adhesion force of the material against the portion of the element, the materials of the portion of the element and of the portion of the surface of the support being selected such that the adhesion of the material against the portion of the element is, at the end of the annealing, higher than that of the material against the portion of the surface of the support; and separation of the element and the support at the interface between the material and the portion of the surface of the support, the material remaining secured to the portion of the element.

A power module includes an insulating substrate, a case member, a power semiconductor element, a base member, a sealing member, and an adhesive member. The insulating substrate has a first surface and a second surface opposite to the first surface. The case member surrounds the insulating substrate when viewed in a direction perpendicular to the first surface. The power semiconductor element faces the first surface. The base member faces the second surface. The sealing member seals the power semiconductor element and the insulating substrate and is in contact with the case member. The adhesive member fixes the base member and the case member, and surrounds the insulating substrate when viewed in the direction perpendicular to the first surface.

A composite substrate includes, in this order: a ceramic plate; a metal layer containing at least one selected from the group consisting of aluminum and an aluminum alloy; and a thermal sprayed layer containing at least one selected from the group consisting of copper and a copper alloy, and an intermetallic compound containing copper and aluminum as constituent elements is scattered between the metal layer and the thermal sprayed layer.

A method for producing a power semiconductor system includes packaging a power device in plastic to form a power semiconductor component, forming a first heat dissipation face on a surface of the power semiconductor component; heating a first material between a first heat sink and the first heat dissipation face; and cooling the first material on the first heat dissipation face to connect the power semiconductor component and the first heat sink.

Implementations of semiconductor devices may include a die coupled over a lead frame, a redistribution layer (RDL) coupled over the die, a first plurality of vias coupled between the RDL and the die, and a second plurality of vias coupled over and directly to the lead frame. The second plurality of vias may be adjacent to an outer edge of the semiconductor device and may be electrically isolated from the die.

A semiconductor apparatus includes: a first semiconductor chip; a resin enclosure having a space in which the first semiconductor chip is positioned; a lead terminal disposed in the resin enclosure; a second semiconductor chip configured to: control the first semiconductor chip, and be disposed on a first portion of the resin enclosure, the resin enclosure not overlapping with the lead terminal, as seen in planar view from a direction perpendicular to a top surface of the lead terminal; and a wire having a first end connected to the lead terminal and a second end connected to the second semiconductor chip.

A semiconductor apparatus includes: a first semiconductor chip; a resin enclosure having a space in which the first semiconductor chip is positioned; a lead terminal disposed in the resin enclosure; a second semiconductor chip configured to: control the first semiconductor chip, and be disposed on a first portion of the resin enclosure, the resin enclosure not overlapping with the lead terminal, as seen in planar view from a direction perpendicular to a top surface of the lead terminal; and a wire having a first end connected to the lead terminal and a second end connected to the second semiconductor chip.

Provided is an electronic apparatus including a metal wiring. The metal wiring includes a plurality of first regions covered with a solder layer, a second region provided between two first regions of the plurality of first regions, and a third region having a nitrogen amount of 20 atoms % or more. An oxygen amount is largest in the second region, followed by at least one of the plurality of first regions, and then by the third region. The nitrogen amount may be largest in the third region, followed by at least one of the plurality of first regions, and then by the second region.

Provided is an electronic apparatus including a metal wiring. The metal wiring includes a plurality of first regions covered with a solder layer, a second region provided between two first regions of the plurality of first regions, and a third region having a nitrogen amount of 20 atoms % or more. An oxygen amount is largest in the second region, followed by at least one of the plurality of first regions, and then by the third region. The nitrogen amount may be largest in the third region, followed by at least one of the plurality of first regions, and then by the second region.

A semiconductor device includes first and second conductive parts, a first bonding wire connecting the first and second conductive parts and having a non-flat portion between opposite ends thereof so that a portion between the opposite ends is away from the first and second conductive parts, a case having a housing space to accommodate the first and second conductive parts, including a sidewall having first to fourth lateral faces surrounding the housing space to form a rectangular shape in a plan view, and a cover disposed on the sidewall, a sealing member filling the case to seal the first bonding wire, and a first stress relaxer for relieving a stress in the first bonding wire. The first bonding wire extends from the second lateral face toward the fourth lateral face, and the first stress relaxer is positioned between the first bonding wire and the first lateral face.