A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.

A layer structure includes a first layer including at least one material selected from a first group consisting of nickel, copper, gold, silver, palladium, tin, zinc, platinum, and an alloy of any of these materials; a third layer including at least one material selected from a second group consisting of nickel, copper, gold, palladium, tin, silver, zinc, platinum, and an alloy of any of these materials; and a second layer between the first layer and the third layer. The second layer consists of or essentially consists of nickel and tin. The second layer includes an intermetallic phase of nickel and tin.

A method of integrating a first substrate having a first surface with a first insulating material and a first contact structure with a second substrate having a second surface with a second insulating material and a second contact structure. The first insulating material is directly bonded to the second insulating material. A portion of the first substrate is removed to leave a remaining portion. A third substrate having a coefficient of thermal expansion (CTE) substantially the same as a CTE of the first substrate is bonded to the remaining portion. The bonded substrates are heated to facilitate electrical contact between the first and second contact structures. The third substrate is removed after heating to provided a bonded structure with reliable electrical contacts.

A semiconductor device, including a substrate having an insulating plate and a conductive plate formed on the insulating plate, a semiconductor chip formed on the conductive plate, a contact part arranged on the conductive plate with a bonding member therebetween, a rod-shaped external connection terminal having a lower end portion thereof fitted into the contact part, and a lid plate having a front surface and a back surface facing the substrate. An insertion hole pierces the lid plate, forming an entrance and exit respectively on the back and front surfaces of the lid plate. The external connection terminal is inserted in the insertion hole. The semiconductor device has at least one of a guide portion with an inclined surface, fixed to a portion of the external connection terminal located in the insertion hole, or an inclined inner wall of the insertion hole.

A semiconductor device, including a substrate having an insulating plate and a conductive plate formed on the insulating plate, a semiconductor chip formed on the conductive plate, a contact part arranged on the conductive plate with a bonding member therebetween, a rod-shaped external connection terminal having a lower end portion thereof fitted into the contact part, and a lid plate having a front surface and a back surface facing the substrate. An insertion hole pierces the lid plate, forming an entrance and exit respectively on the back and front surfaces of the lid plate. The external connection terminal is inserted in the insertion hole. The semiconductor device has at least one of a guide portion with an inclined surface, fixed to a portion of the external connection terminal located in the insertion hole, or an inclined inner wall of the insertion hole.

A display panel includes a pixel array substrate, a plurality of vertical light emitting devices and a flip-chip light emitting device. The pixel array substrate has a first pixel area and a second pixel area. The vertical light emitting devices are disposed in the first pixel area and the second pixel area and electrically connected to the pixel array substrate. The flip-chip light emitting device is disposed in the second pixel area and electrically connected to the pixel array substrate. A color of an emitted light beam of the flip-chip light emitting device and a color of an emitted light beam of one of the vertical light emitting devices located in the first pixel area are identical.

A semiconductor device manufacturing method includes preparing a semiconductor chip and a conductive plate having a front surface that includes a disposition area on which the semiconductor chip is to be disposed, forming a supporting portion in a periphery of the disposition area of the conductive plate such that the supporting portion protrudes from a bottom of the disposition area in an upward direction orthogonal to the front surface of the conductive plate, bonding the semiconductor chip to the disposition area via bonding material applied to the disposition area, coating the front surface of the conductive plate, including the semiconductor chip and the supporting portion, with a coating layer, and after the coating, sealing the front surface of the conductive plate, including the semiconductor chip and the supporting portion, with sealing material.

An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.

An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.

A die bonding structure is provided. The die bonding structure includes a chip, an adhesive layer under the chip, a bonding layer under the adhesive layer, and a heat dissipation substrate under the bonding layer. The bonding layer includes a silver nano-twinned thin film, which has parallel-arranged twin boundaries. The parallel-arranged twin boundaries include at least 90% of [111] crystal orientation.