Patent classifications
H01L2224/29172
METAL PATCH, METHOD FOR MANUFACTURING THE SAME AND BONDING METHOD BY USING THE SAME
A metal patch suitable for connecting a high-power element and a substrate is provided. The metal patch includes an intermediate metal layer, two first metal layers, and two second metal layers. The first metal layers are respectively disposed on two opposite surfaces of the intermediate metal layer. The intermediate metal layer is located between the first metal layers. The melting point of each of the first metal layers is greater than 800 C. The second metal layers are respectively disposed on the first metal layers. The intermediate metal layer and the first metal layers are located between the second metal layers. The material of each of the second metal layers includes an indium-tin alloy. Each of the first metal layers and the corresponding second metal layer can generate an intermetal via a solid-liquid diffusion reaction.
DIE ATTACH STRUCTURE, SEMICONDUCTOR PACKAGE, METHOD OF FORMING A DIE ATTACH STRUCTURE, METHOD OF FORMING A SEMICONDUCTOR PACKAGE, METAL LAYER STACK AND METHOD OF FORMING A METAL LAYER STACK
A die attach structure, metal layer stack, and semiconductor package are disclosed. For one example, a die attach structure is provided. The die attach structure may include a base structure comprising or consisting of aluminum or an aluminum alloy, at least one adhesion promotion layer directly on the base structure and comprising or consisting of ZnCr or ZnV, and a copper layer on the at least one adhesion promotion layer.
PACKAGE AND MANUFACTURING METHOD THEREOF
The present disclosure provides a method. In some embodiments, the method includes providing a substrate; bonding a package structure to the substrate; attaching a ring structure on the substrate and surrounding the package structure; forming a thermal interface material (TIM) layer over the package structure; attaching a heat sink structure to the TIM layer and the ring structure.
Semiconductor package and method
A semiconductor package including two different adhesives and a method of forming are provided. The semiconductor package may include a package component having a semiconductor die bonded to a substrate, a first adhesive over the substrate, a heat transfer layer on the package component, and a lid attached to the substrate by a second adhesive. The first adhesive may encircle the package component and the heat transfer layer. The lid may include a top portion on the heat transfer layer and the first adhesive, and a bottom portion attached to the substrate and encircling the first adhesive. A material of the second adhesive may be different from a material of the first adhesive.
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING OF THE SEMICONDUCTOR DEVICE
A semiconductor device is provided, including a die constituting the top layer of the semiconductor device, preferably made of silicone; a lead frame constituting the bottom layer of the semiconductor device, having high electrical conductivity in the range between 6.310.sup.7 Siemens to 110.sup.6 Siemens more preferably 110.sup.7 Siemens (electrical conductivity is normally measured in Siemens per meter S/m, range of conductivity for Cu alloy lead frames are between 5 to 610.sup.7 S/m) for example made of L/F C19210 material; a first layer formed from a metallic foam located between the lead frame and the die, with a thickness preferably in the range of 500 nm to 5000 nm more preferably 2000 nm, and with a porosity in range of 30% and 90% preferably 60% and a second layer located between the die and the lead frame being only partially in surface contact with the first layer.