A method of forming a metal bonding layer includes forming first and second bonding metal layers on one surfaces of first and second bonding objects, respectively. The second bonding object is disposed on the first bonding object such that the first bonding metal layer and the second bonding metal layer face each other. A eutectic metal bonding layer is formed through a reaction between the first and second bonding metal layers. At least one of the first bonding metal layer and the second bonding metal layer includes an oxidation prevention layer formed on an upper surface thereof. The oxidation prevention layer is formed of a metal having an oxidation reactivity lower than an oxidation reactivity of the bonding metal layer on the upper surface which the oxidation prevention layer is disposed.

A method of forming a metal bonding layer includes forming first and second bonding metal layers on one surfaces of first and second bonding objects, respectively. The second bonding object is disposed on the first bonding object such that the first bonding metal layer and the second bonding metal layer face each other. A eutectic metal bonding layer is formed through a reaction between the first and second bonding metal layers. At least one of the first bonding metal layer and the second bonding metal layer includes an oxidation prevention layer formed on an upper surface thereof. The oxidation prevention layer is formed of a metal having an oxidation reactivity lower than an oxidation reactivity of the bonding metal layer on the upper surface which the oxidation prevention layer is disposed.

Various embodiments include integrated circuit packages and methods of forming integrated circuit packages. In an embodiment, a device includes: a package substrate; an integrated circuit device attached to the package substrate; a stiffener ring around the integrated circuit device and attached to the package substrate; a lid attached to the stiffener ring; a channel connected to an area between the lid and the integrated circuit device, the channel extending along at least one side of the integrated circuit device in a top-down view; and a thermal interface material in the channel and in the area between the lid and the integrated circuit device.