Patent classifications
H01L2224/2918
PHYSICAL QUANTITY MEASUREMENT DEVICE AND METHOD FOR MANUFACTURING SAME, AND PHYSICAL QUANTITY MEASUREMENT ELEMENT
It is an object to provide a highly reliable physical-quantity measurement device which can relax thermal stress at a time of bonding and suppress creep or drift of a sensor output.
To attain the above-described object, a physical-quantity measurement device according to the present invention includes a semiconductor element, and a base board connected to the semiconductor element with a plurality of layers being interposed. In the plurality of layers, a stress relaxing layer including at least metal as a main ingredient and a glass layer including glass as a main ingredient are formed each in a layered form including one or more layers. At least one of the stress relaxing layer and the glass layer includes low-melting-point glass, and a softening point of the low-melting-point glass is equal to or lower than the highest heat temperature that the semiconductor element can resist.
Micro-bonding structure
A micro-bonding structure including a substrate, a conductive pad, a bonding layer, a micro device, and a diffusive bonding portion is provided. The conductive pad is present on the substrate. The bonding layer is present on the conductive pad. The micro device is present on the bonding layer. The diffusive bonding portion is present between and electrically connected with the bonding layer and the conductive pad. The diffusive bonding portion consists of at least a part of elements from the bonding layer and at least a part of elements from the conductive pad. A plurality of voids are present between the bonding layer and the conductive pad, and one of the voids is bounded by the diffusive bonding portion and at least one of the conductive pad and the bonding layer.
Micro-bonding structure
A micro-bonding structure including a substrate, a conductive pad, a bonding layer, a micro device, and a diffusive bonding portion is provided. The conductive pad is present on the substrate. The bonding layer is present on the conductive pad. The micro device is present on the bonding layer. The diffusive bonding portion is present between and electrically connected with the bonding layer and the conductive pad. The diffusive bonding portion consists of at least a part of elements from the bonding layer and at least a part of elements from the conductive pad. A plurality of voids are present between the bonding layer and the conductive pad, and one of the voids is bounded by the diffusive bonding portion and at least one of the conductive pad and the bonding layer.
Low temperature high reliability alloy for solder hierarchy
A lead-free, antimony-free solder alloy_suitable for use in electronic soldering applications. The solder alloy comprises (a) from 1 to 4 wt. % silver; (b) from 0.5 to 6 wt. % bismuth; (c) from 3.55 to 15 wt. % indium, (d) 3 wt. % or less of copper; (e) one or more optional elements and the balance tin, together with any unavoidable impurities.
LAYERED BONDING MATERIAL, SEMICONDUCTOR PACKAGE, AND POWER MODULE
A layered bonding material 10 includes a base material 11, a first solder section 12a stacked on a first surface of the base material 11, and a second solder section 12b stacked on a second surface of the base material 11. A coefficient of linear expansion of the base material 11 is 5.5 to 15.5 ppm/K, the first solder section 12a and the second solder section 12b are made of lead-free solder, and both of a thickness of the first solder section 12a and a thickness of the second solder section 12b are 0.05 to 1.0 mm.
PHASE CHANGING THERMAL INTERFACE MATERIAL ALLOY CREATED IN-SITU
Thermal interface materials deposited in solid form, in a layered manner, and their uses in electronics assembly are described. In one implementation, a method includes: forming an assembly including multiple solid metal thermal interface materials (TIMs) between a first device and a second device such that a first surface of the solid metal TIMs is in touching relation with a surface of the first device, and a second surface of the solid metal TIMs opposite the first surface is in touching relation with a surface of the second device, the solid metal TIMs including a first solid metal TIM and a second solid metal TIM; and forming a liquid TIM alloy from the solid metal TIMs by heating the assembly above a first solidus temperature of the first solid metal TIM, the liquid TIM alloy having a second solidus temperature below the first solidus temperature.
Semiconductor modules with semiconductor dies bonded to a metal foil
A method of manufacturing semiconductor modules includes providing a metal composite substrate including a metal foil attached to a metal layer, the metal foil being thinner than and comprising a different material than the metal layer, attaching a first surface of a plurality of semiconductor dies to the metal foil prior to structuring the metal foil, and encasing the semiconductor dies attached to the metal foil in an electrically insulating material. The metal layer and the metal foil are structured after the semiconductor dies are encased with the electrically insulating material so that surface regions of the electrically insulating material are devoid of the metal foil and the metal layer. The electrically insulating material is divided along the surface regions devoid of the metal foil and the metal layer to form individual modules.
Semiconductor modules with semiconductor dies bonded to a metal foil
A method of manufacturing semiconductor modules includes providing a metal composite substrate including a metal foil attached to a metal layer, the metal foil being thinner than and comprising a different material than the metal layer, attaching a first surface of a plurality of semiconductor dies to the metal foil prior to structuring the metal foil, and encasing the semiconductor dies attached to the metal foil in an electrically insulating material. The metal layer and the metal foil are structured after the semiconductor dies are encased with the electrically insulating material so that surface regions of the electrically insulating material are devoid of the metal foil and the metal layer. The electrically insulating material is divided along the surface regions devoid of the metal foil and the metal layer to form individual modules.
Hetero-bipolar transistor and method for producing the same
A method of producing a semiconductor device includes steps of: growing semiconductor layers to form a semiconductor stack on a semiconductor substrate; forming a first adhesive layer on the semiconductor stack; bonding a temporary support made of non-semiconductor material to the first adhesive layer; removing the semiconductor substrate from the semiconductor stack to expose a surface of the semiconductor stack; forming a second adhesive layer on the exposed surface of the semiconductor stack; bonding a support to the second adhesive layer; and removing the temporary support from the semiconductor stack. The support has a thermal conductivity greater than the thermal conductivities of the semiconductor layer in the semiconductor stack. In forming the first adhesive layer, this layer can cover the entire surface, or both the top and a side of the semiconductor stack. Before forming the first adhesive layer, a protective layer can be formed on the semiconductor stack.
Hetero-bipolar transistor and method for producing the same
A method of producing a semiconductor device includes steps of: growing semiconductor layers to form a semiconductor stack on a semiconductor substrate; forming a first adhesive layer on the semiconductor stack; bonding a temporary support made of non-semiconductor material to the first adhesive layer; removing the semiconductor substrate from the semiconductor stack to expose a surface of the semiconductor stack; forming a second adhesive layer on the exposed surface of the semiconductor stack; bonding a support to the second adhesive layer; and removing the temporary support from the semiconductor stack. The support has a thermal conductivity greater than the thermal conductivities of the semiconductor layer in the semiconductor stack. In forming the first adhesive layer, this layer can cover the entire surface, or both the top and a side of the semiconductor stack. Before forming the first adhesive layer, a protective layer can be formed on the semiconductor stack.