Patent classifications
H01L2224/2929
Semiconductor light emitting device
Semiconductor light emitting device includes: substrate including main and back surfaces, first and second side surfaces, and bottom and top surfaces, wherein main surface includes first to fourth sides; first main surface electrode on main surface and including first base portion contacting the sides of the main surface, and die pad connected to first base portion; second main surface electrode disposed on the main surface and including second base portion contacting first and third sides of the main surface, and wire pad connected to second base portion; semiconductor light emitting element including first electrode pad and mounted on die pad; wire connecting first electrode pad and wire pad; first insulating film covering portion between first base portion and die pad; second insulating film covering portion between second base portion and wire pad and having end portions contacting main surface; and light-transmitting sealing resin.
Semiconductor light emitting device
Semiconductor light emitting device includes: substrate including main and back surfaces, first and second side surfaces, and bottom and top surfaces, wherein main surface includes first to fourth sides; first main surface electrode on main surface and including first base portion contacting the sides of the main surface, and die pad connected to first base portion; second main surface electrode disposed on the main surface and including second base portion contacting first and third sides of the main surface, and wire pad connected to second base portion; semiconductor light emitting element including first electrode pad and mounted on die pad; wire connecting first electrode pad and wire pad; first insulating film covering portion between first base portion and die pad; second insulating film covering portion between second base portion and wire pad and having end portions contacting main surface; and light-transmitting sealing resin.
Composite media protection for pressure sensor
Embodiments for a packaged semiconductor device and methods of making are provided herein, where a packaged semiconductor device includes a package body having a recess in which a pressure sensor is exposed; a polymeric gel within the recess that vertically and laterally surrounds the pressure sensor; and a protection layer including a plurality of beads embedded within a top region of the polymeric gel.
Composite media protection for pressure sensor
Embodiments for a packaged semiconductor device and methods of making are provided herein, where a packaged semiconductor device includes a package body having a recess in which a pressure sensor is exposed; a polymeric gel within the recess that vertically and laterally surrounds the pressure sensor; and a protection layer including a plurality of beads embedded within a top region of the polymeric gel.
Multi-zone radio frequency transistor amplifiers
RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.
Multi-zone radio frequency transistor amplifiers
RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
A display device includes a substrate including a display area and a pad area, a plurality of pad electrodes disposed in the pad area on the substrate, a circuit board disposed to overlap at least a portion of the pad area on the substrate, and an anisotropic conductive layer disposed in the pad area between the substrate and the circuit board. The circuit board includes a base substrate and a plurality of bump electrodes disposed on a lower surface of the base substrate. The anisotropic conductive layer includes an adhesive layer and a plurality of conductive particles arranged in the adhesive layer. Each of the conductive particles includes a core, a first conductive film disposed on the core in a way such that at least a portion of the core is exposed, and a second conductive film entirely covering the core and the first conductive film.
METHOD OF REPAIRING A DISPLAY PANEL AND REPAIRED DISPLAY PANEL
A method of repairing a display panel and a repaired display panel are provided. The display panel includes a panel substrate, a plurality of micro LEDs arranged on the panel substrate, and a molding member covering the plurality of micro LEDs. The molding member includes a first molding member and a second molding member disposed in a region surrounded by the first molding member. The second molding member has a composition or a shape different from that of the first molding member, and the second molding member surrounds at least one side surface of the plurality of micro LEDs.
Semiconductor device comprising semiconductor die and interposer and manufacturing method thereof
A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
Method for manufacturing semiconductor package
The present disclosure relates to a method for manufacturing a semiconductor package including vacuum-laminating a non-conductive film on a substrate on which a plurality of through silicon vias are provided and bump electrodes are formed, and then performing UV irradiation, wherein an increase in melt viscosity before and after UV irradiation can be adjusted to 30% or less, whereby a bonding can be performed without voids during thermo-compression bonding, and resin-insertion phenomenon between solders can be prevented, fillets can be minimized and reliability can be improved.