Methods for die attachment of multichip and single components including flip chips may involve printing a sintering paste on a substrate or on the back side of a die. Printing may involve stencil printing, screen printing, or a dispensing process. Paste may be printed on the back side of an entire wafer prior to dicing, or on the back side of an individual die. Sintering films may also be fabricated and transferred to a wafer, die or substrate. A post-sintering step may increase throughput.

A method for producing a material-bonding connection between a semiconductor chip and a metal layer is disclosed. For this purpose, a semiconductor chip, a metal layer, which has a chip mounting portion, and also a bonding medium containing a metal powder are provided. The metal powder is sintered in a sintering process. In this case, throughout a prescribed sintering time, the prescribed requirements are met, that the bonding medium is arranged between the semiconductor chip and the metal layer and extends right through from the semiconductor chip to the metal layer, that the semiconductor chip and the metal layer are pressed against one another in a pressing-pressure range that lies above a minimum pressing pressure, that the bonding medium is kept in a temperature range that lies above a minimum temperature and that a sound signal is introduced into the bonding medium.

Methods and apparatuses for controlled processing of high temperature bonding systems via devices to control heating and cooling systems of a high temperature heating bonding includes use of a sinter fixture device including a plate surface, that is shaped to contact and conform to a contacting surface of a TLPS substrate assembly, and a plurality of channels below the plate surface within a base body of the sinter fixture device shaped to receive heating and cooling elements. A first set of the one or more channels includes a plurality of cross-channels, a cooling medium inlet, and a cooling medium outlet, which cross-channels, cooling medium inlet, and cooling medium outlet are in fluid communication with one another. A second set of the one or more channels includes a plurality of heating element passageways.

A carrier and the clip are used to produce a packaging having a lead frame by connection to the chip using sintering of the solidified sintering pastes in one work step. The carrier may be a lead frame and a clip for at least one semiconductor element has at least one functional surface for connecting to the semiconductor element and a plurality of connections. The material of the carrier or of the clip includes a metal and a layer made of a solidified sintering paste. The sintering paste may contain silver and/or a silver compound. The sintering paste is arranged on the functional surface. The carrier or clip and the layer made of sintering paste form an intermediate product that can be connected to the semiconductor element.

An anisotropic conductive film contains conductive particles and spacers. The spacers are arranged at a central part of the film in a width direction. The central part of the film in the width direction represents 20 to 80% of the overall width of the film. The height of the spacers in the thickness direction of the anisotropic conductive film is larger than 5 m and less than 75 m. Such an anisotropic conductive film has a layered structure having a first insulating adhesion layer and a second insulating adhesion layer, wherein the conductive particles are dispersed in the first insulating adhesion layer, and the spacers are regularly arranged on a surface of the first insulating adhesion layer on a side of the second insulating adhesion layer.

In one implementation, a method of fabricating a power semiconductor package is disclosed. The method includes providing a conductive carrier array including a plurality of power modules held together with connecting bars, where each of the plurality of power modules includes a control transistor, a sync transistor, and a driver IC. The method further includes overlying on the conductive carrier array a heat spreader array including a plurality of power electrode heat spreaders such that each of the plurality of power electrode heat spreaders couples a drain of the sync transistor to a source of the control transistor in each power module.

In one implementation, a method of fabricating a power semiconductor package is disclosed. The method includes providing a conductive carrier array including a plurality of power modules held together with connecting bars, where each of the plurality of power modules includes a control transistor, a sync transistor, and a driver IC. The method further includes overlying on the conductive carrier array a heat spreader array including a plurality of power electrode heat spreaders such that each of the plurality of power electrode heat spreaders couples a drain of the sync transistor to a source of the control transistor in each power module.

A method of bonding a first substrate to a second substrate includes disposing a first high melting point metal layer onto a first substrate, disposing a first low melting point metal layer onto the first high melting point metal layer, disposing a second high melting point metal layer onto a second substrate, and disposing a second low melting point metal layer onto the second high melting point metal layer. The method further includes applying precursor metal particles onto the first and/or second low melting point metal layers, positioning the first and second low melting point metal layers such that the precursor metal particles contact both the first and second low melting point metal layers, and bonding the first substrate to the second substrate by heating the precursor metal particles and each metal layer to form an intermetallic alloy bonding layer between the first and second substrates.