A frame is made of a first material. An external terminal electrode is attached to the frame. A heat sink plate supports the frame and includes a mounting region in the frame. The heat sink plate is made of a non-composite material containing copper with purity of 95.0 weight percentage or more. A first adhesive layer bonds the frame and the heat sink plate to each other. The first adhesive layer is made of a second material different from the first material, and has a first composition. A power semiconductor element is mounted on the mounting region of the heat sink plate. A cover is attached to the frame to constitute a sealing space sealing the power semiconductor element without gross leak. A second adhesive layer bonds the frame and the cover to each other, and has a second composition different from the first composition of the first adhesive layer.

A semiconductor device includes a circuit board including an insulating layer having opposite front and rear surfaces, an electrode pad disposed on the front surface, a housing having an installation area for the circuit board, and a bonding material embedded in a recess within either a first area located at the rear surface of the insulating layer directly below an area of the circuit board in which the electrode pad is disposed, or at a second area located within the installation area of the housing and corresponding to the first area in a plan view.

A semiconductor apparatus includes a heatsink plate, a substrate disposed on the heatsink plate, a circuit pattern disposed on the substrate, a semiconductor chip disposed on the circuit pattern, a case fixed to the heatsink plate and surrounding an outer perimeter of the substrate, a terminal attached to the case, and a wire configured to electrically connect the terminal to the circuit pattern or to the semiconductor chip. In a plan view as viewed in the thickness direction of the heatsink plate, a portion of the circuit pattern overlaps the terminal.

A display device comprises a substrate, a pixel electrode on the substrate, a light emitting element on the pixel electrode, and a common electrode layer on the light emitting element, and configured to receive a common voltage, wherein the light emitting element configured to emit a first light according to a driving current having a first current density, is configured to emit a second light according to a driving current having a second current density, and is configured to emit a third light according to a driving current having a third current density.

A semiconductor apparatus includes: a base, an insulating substrate arranged on the base, a semiconductor element arranged on the insulating substrate, a case joined to the base and housing the semiconductor element, and a sealing material supplied in the case. The case includes a terminal block that extends in a first direction from an inner wall surface of the case. The terminal block is arranged thereon a terminal that is electrically connected to the semiconductor element via a wiring member. The terminal block includes a projecting portion that extends, in plan view, in the first direction from a first position of a distal end portion of the terminal to a second position. A first distance between the first position and the second position is at least 1 mm.

A recording element unit includes a first electrode pad, a second electrode pad, and a wire for electrically connecting the first electrode pad and the second electrode pad. The wire has a plurality of bending points at which the wire is bent in the direction of extension of the wire between a first connection point and a second connection point, the plurality of bending points include a first bending point at a height from the first connection point of at least 100 μm and not more than 200 μm, a second bending point at a distance from the first bending point in the horizontal direction of at least 100 μm and not more than 270 μm, and a third bending point at a distance from the intermediate point between the first electrode pad and the second electrode pad in the horizontal direction of within 150 μm.

The present invention discloses a packaging structure of a high-power radio frequency device, comprising a plurality of radio frequency power chips connected in parallel and a packaging flange; and the plurality of radio frequency power chips are arranged obliquely in a packaging cavity of the packaging flange, to reduce the number of input bond-wires of the radio frequency power chips, so that the input bond-wires and output bond-wires are not overlapped in space. The plurality of chips are arranged obliquely on the packaging flange, which significantly improves the utilization rate of packaging space and achieves the purpose of high-power output.

An optical module includes: a light source; an optical modulator capable of modulating light from the light source; a capacitor with an upper electrode and a lower electrode; and a resistor connected in series with and bonded face-to-face to the upper electrode of the capacitor. The resistor and the capacitor are connected in parallel with the optical modulator.

A transistor amplifier package includes a base, one or more transistor dies on the base, first and second leads coupled to the one or more transistor dies and defining respective radio frequency (RF) signal paths, and an isolation structure on the base between the respective RF signal paths. The isolation structure includes first and second wire bonds. The first and second wire bonds may have a crossed configuration defining at least one cross point therebetween. Related wire bond-based isolation structures are also discussed.

The present application discloses an electronic fuse control circuit, a semiconductor device and a method for forming a semiconductor device including an electronic fuse control circuit. The electronic fuse control circuit includes a program voltage pad, a fuse element, a latch, an operation switch unit, resistor selection pads, and bonding option units. The fuse element includes a first terminal coupled to the program voltage pad, and a second terminal. The operation switch unit forms an electrical connection between the second terminal of the fuse element and a ground terminal during a program operation, and forms an electrical connection between the second terminal of the fuse element and an input terminal of the latch during a read operation. Each of the bonding option units includes a resistor and a selection switch coupled in series between the input terminal of the latch and a resistor selection pad.