A three-phase load is powered by a PWM (e.g., SVPWM) driven DC-AC inverter having a single shunt-topology. A shunt voltage and a branch voltage of the inverter (across a transistor to be calibrated) are measured during a second period of each SVPWM sector, and the drain-to-source resistance of the calibrated transistor is calculated. During the fourth period of each SVPWM sector, the branch voltage is measured again, and another branch voltage across another transistor is measured. Using the drain-to-source resistance of the calibrated transistor and the voltage across the calibrated transistor measured during the fourth period, the phase current through the calibrated transistor is calculated. Using the other branch voltage measured during the fourth period and the drain-to-source resistance of its corresponding transistor (known from a prior SVPWM sector), the phase current through that transistor is calculated. From the two calculated phase currents, the other phase current can be calculated.

A cooperative control method for an energy conversion apparatus is disclosed. The cooperative control method includes: acquiring a target heating power, a target driving power, and a target charging and discharging power; acquiring a first heating power of a motor coil according to the target charging and discharging power; acquiring a second heating power of the motor coil according to the target driving power; adjusting a first quadrature axis current and a first direct axis current to a target quadrature axis current and a target direct axis current when a difference between a sum of the first heating power and the second heating power and the target heating power is not within a preset range, to cause the difference between the sum of the first heating power and the second heating power and the target heating power to be within the preset range; and acquiring a sampling current value on each phase coil and a motor rotor position, and calculating a duty cycle of each phase bridge arm in a reversible pulse width modulation (PWM) rectifier.

A system for providing power to one or more loads includes a plurality of power converters where each power converter is configured to be arranged in a parallel configuration with one or more additional power converters so as to provide power to the one or more loads. The system also includes a central controller configured to receive a plurality of local voltage reference values from each of the power converters, output a global voltage reference value based on the local voltage reference values, and transmit the global voltage reference value to each of the power converters.

A control system and method for an inverter that reduces capacitor current through a DC bus capacitor of the inverter. The control system and method may generate switching signals for a plurality of switching circuits in a manner that reduces capacitor current through the DC bus capacitor.

Method of controlling a multi-level inverter having inputs connected to a gate drive unit controlling the inverter and an output connected to a load, the multi-level inverter capable of generating a PWM voltage signal having three or more modulation levels, the inverter powered by a voltage supply and comprising at least one neutral point (NP), the method comprising operating the multi-level inverter in a standard modulation pattern having three or more modulation levels when one or more parameters representative of neutral point stability each have a value within a first range indicative of a high neutral point stability, and operating the multi-level inverter with a two-level modulation pattern when said one or more parameters representative of neutral point stability each have a value within a second range indicative of a low neutral point stability, the first range separated from the second range by a threshold value.

A power conversion device includes a switching signal generation unit that generates switching signals so that time points of at least one of pairs synchronize with each other. A first pair includes a rising time point at a first junction point of a first single-phase leg, and a falling time point at a second junction point of a second single-phase leg. A second pair includes a falling time point at the first junction point and a rising time point at the second junction point. The switching signal generation unit determines time points to turn on or turn off for upper arm switching element and a lower arm switching element based on phase currents respectively at a rising time point and at a falling time point of the terminal voltages.

A motor control unit includes a three-phase full-bridge three-level inverter circuit and a control apparatus. The three-phase full-bridge three-level inverter circuit includes a vertical bridge circuit and a horizontal bridge circuit. A current capacity of a switching transistor in the vertical bridge circuit is greater than or equal to a maximum current of a motor. A current capacity of a switching transistor in the horizontal bridge circuit is less than the current capacity of the switching transistor in the vertical bridge circuit. The control apparatus is configured to control the switching transistor in the horizontal bridge circuit based on torque of the motor, a current output by an output terminal of the vertical bridge circuit, a temperature of the switching transistor in the horizontal bridge circuit, and a terminal voltage of the switching transistor in the horizontal bridge circuit.

A method for controlling a fault of a three phase four wire interlinking converter system according to one embodiment of the present disclosure comprises obtaining a first d-q-o coordinate plane based on an internal phase angle of output voltage produced from each phase of an inverter; converting the first d-q-o coordinate plane to a second d-q-o coordinate plane based on the o-axis configured differently from the first d-q-o coordinate plane; obtaining an output voltage vector for determining a fault location by performing d-q transform on the second d-q-o coordinate plane; determining occurrence of a fault and an area related to the fault based on the output voltage vector; and in the occurrence of the fault, allocating a zero voltage vector to the area related to the fault.

A common-mode voltage injection control method and apparatus for an inverter. For the method and apparatus, a common-mode voltage for a DPWM mode is calculated based on three-phase port voltages and an output power command; a common-mode voltage for an MPC modulation mode is calculated based on the direct current bus voltage, the three-phase port voltages, and the output power command; a modulation proportion is determined based on a maximum phase voltage peak value of the three-phase port voltages, the direct current bus voltage, and a power factor of the output power command; and a common-mode injection voltage is generated based on the common-mode voltage for the DPWM mode, the modulation proportion, and the common-mode voltage for the MPC modulation mode.

A modulation technique is described in which a controller modulates the output AC voltages to introduce an offset to the phase that is most positive or most negative such that the phase is clamped to the +dc supply when the respective phase is most positive and to the −dc supply rail when most negative. The offset is provided by introducing a common mode component voltage to all of the phases over a plurality of output angle segments. In order to reduce the Noise Vibration and Harshness (NVH) and EMI, the common mode component voltage amplitude is varied over the output angles within the respective segment between a minimum and a maximum in order to control a slew rate of the rising or falling edges of the three phase AC output voltages.