A processing chamber such as a plasma etch chamber can perform deposition and etch operations, where byproducts of the deposition and etch operations can build up in a vacuum pump system fluidly coupled to the processing chamber. A vacuum pump system may have multiple roughing pumps so that etch gases can be diverted a roughing pump and deposition precursors can be diverted to another roughing pump. A divert line may route unused deposition precursors through a separate roughing pump. Deposition byproducts can be prevented from forming by incorporating one or more gas ejectors or venturi pumps at an outlet of a primary pump in a vacuum pump system. Cleaning operations, such as waferless automated cleaning operations, using certain clean chemistries may remove deposition byproducts before or after etch operations.

An etching method includes: (a) providing a substrate including a silicon-containing film on a substrate support; (b) adjusting a temperature of the substrate support to −20° C. or lower; (c) supplying a processing gas including a nitrogen-containing gas, into the chamber; (d) etching the silicon-containing film by using plasma generated from the processing gas. A recess is formed by etching the silicon-containing film, and a by-product containing silicon and nitrogen adheres to a side wall of the recess. The etching method further includes (e) setting at least one etching parameter of the temperature of the substrate support and the flow rate of the nitrogen-containing gas included in the processing gas, to adjust the width of the bottom of the recess according to an adhesion amount of the by-product, before (b).

A resist underlayer film composition for use in a multilayer resist method, containing one or more compounds shown by formula (1), and an organic solvent,

WX).sub.n   (1)

W represents an n-valent organic group having 2 to 50 carbon atoms. X represents a monovalent organic group shown by formula (1X). “n” represents an integer of 1 to 10,

##STR00001##

The dotted line represents a bonding arm. R.sup.01 represents an acryloyl or methacryloyl group. Y represents a single bond or a carbonyl group. Z represents a monovalent organic group having 1 to 30 carbon atoms. A resist underlayer film composition can be cured by high energy beam irradiation and form a resist underlayer film having excellent filling and planarizing properties and appropriate etching resistance and optical characteristics in a fine patterning process by a multilayer resist method in the semiconductor apparatus manufacturing process.

A semiconductor fabrication apparatus includes a source chamber being operable to generate charged particles; and a processing chamber integrated with the source chamber and configured to receive the charged particles from the source chamber. The processing chamber includes a wafer stage being operable to secure and move a wafer, and a laser-charged particles interaction module that further includes a laser source to generate a first laser beam; a beam splitter configured to split the first laser beam into a second laser beam and a third laser beam; and a mirror configured to reflect the third laser beam such that the third laser beam is redirected to intersect with the second laser beam to form a laser interference pattern at a path of the charged particles, and wherein the laser interference pattern modulates the charged particles by in a micron-zone mode for processing the wafer using the modulated charged particles.

Trenches of different depths in an integrated circuit are formed by a process utilizes a dry etch. A first stop layer is formed over first and second zones of the substrate. A second stop layer is formed over the first stop layer in only the second zone. A patterned mask defines the locations where the trenches are to be formed. The dry etch uses the mask to etch in the first zone, in a given time, through the first stop layer and then into the substrate down to a first depth to form a first trench. This etch also, at the same time, etch in the second zone through the second stop layer, and further through the first stop layer, and then into the substrate down to a second depth to form a second trench. The second depth is shallower than the first depth.

In the method for manufacturing a semiconductor structure, a film structure is formed on a substrate, a pattern transfer layer is formed on the film structure, a plurality of holes are defined on the pattern transfer layer, and the pattern transfer layer is flattened; the film structure is etched through the holes to form capacitor holes in the film structure.

The present disclosure relates to a method for forming a cavity that traverses a stack of layers including a bottom layer, a first portion of which locally presents an excess thickness, the method comprising a first step of non-selective etching and a second step of selective etching vertically in line with the first portion.

Methods of forming memory structures are discussed. Specifically, methods of forming 3D NAND devices are discussed. Some embodiments form memory structures with a metal nitride barrier layer, an α-tungsten layer, and a bulk metal material. The barrier layer comprises a TiXN or TaXN material, where X comprises a metal selected from one or more of aluminum (Al), silicon (Si), tungsten (W), lanthanum (La), yttrium (Yt), strontium (Sr), or magnesium (Mg).

A semiconductor structure and a forming method therefor are provided. The forming method includes: providing a base, a gate structure, a source/drain doped area, and a bottom dielectric layer; forming a source/drain interconnect layer running through the bottom dielectric layer on a top of the source/drain doped area; forming a top dielectric layer on the bottom dielectric layer; forming a gate contact running through the top dielectric layer on a top of the gate structure and a source/drain contact running through the top dielectric layer on a top of the source/drain interconnect layer; forming a sacrificial side wall layer on side walls of the gate contact and the source/drain contact; forming a gate plug filling the gate contact and a source/drain plug filling the source/drain contact; removing the sacrificial side wall layer to form a first gap; and forming a sealing layer sealing the first gap.

A method for multi-state pulsing to achieve a balance between bow control and mask selectivity is described. The method includes generating a primary radio frequency (RF) signal. The primary RF signal pulses among three states including a first state, a second state, and a third state. The method further includes generating a secondary RF signal. The secondary RF signal pulses among the three states. During the first state, the primary RF signal has a power level that is greater than a power level of the secondary RF signal. Also, during the second state, the secondary RF signal has a power level that is greater than a power level of the primary RF signal. During the third state, power levels of the primary and secondary RF signals are approximately equal.