A semiconductor wafer dicing process is disclosed for dicing a wafer into individual dies. Scribe lines are formed within a polymer coating to expose regions of wafer to form a pre-processed product. The pre-processed product within the chamber is plasma etched to remove the exposed regions of the wafer to separate the individual dies and form a processed product. A frame cover is then removed and the processed product, wafer frame and adhesive tape are exposed to an oxygen plasma within the chamber to partially remove an outermost region of the polymer coating, which is most heavily contaminated with fluorine, to leave a residual polymer coating on the individual dies and form a post-processed product. The residual polymer coating on the individual dies of the post-processed product is then removed.

A template and method of using the template is disclosed. The template can include a body with a first side and a second side, and an extension. The extension can include a first surface adjacent the body, a second surface, and a third surface between the first surface and the second surface, where the first surface includes a curvature and where a portion of the curvature of the first surface is interior to the third surface. The method can include dispensing a formable material over a substrate, where the substrate includes a non-uniform surface topography. The method can also include curing the formable material contacting the second surface of the extension to form a layer over the substrate while the formable material contacting the third surface of the extension remains in a liquid state, wherein curing is performed while the template is contacting the formable material.

A structure is manufactured by forming a mask that has an opening pattern on a fine recessed and projected structure of a substrate having the fine recessed and projected structure with an average period of 1 μm or less on a surface thereof, etching the surface of the substrate from a side of the mask to form a recessed portion which has an opening greater than the average period of the fine recessed and projected structure according to the opening pattern of the mask, the recessed portion having a depth equal to or greater than double a difference in height between recesses and projections of the fine recessed and projected structure, and then removing the mask.

A processing method is disclosed that enables an improved directed self-assembly (DSA) processing scheme by allowing the formation of improved guide strips in the DSA template that may enable the formation of sub-30 nm features on a substrate. The improved guide strips may be formed by improving the selectivity of wet chemical processing between different organic layers or films. In one embodiment, treating the organic layers with one or more wavelengths of ultraviolet light may improve selectivity. The first wavelength of UV light may be less than 200 nm and the second wavelength of UV light may be greater than 200 mn.

A substrate is held in a substrate holder and accommodated in a treatment chamber. A positive electrode panel is arranged opposite to a surface of the substrate. Process gas is sent from a blower panel, toward the positive electrode panel and the substrate. A positive electrode of a high-frequency power source is connected to the positive electrode panel, and a negative electrode of the high-frequency power source is connected to the blower panel, to apply a high-frequency voltage. The process gas passes between the positive electrode panel and the blower panel which is the negative electrode, so that plasma is generated. The generated plasma removes contaminants on the surface of the substrate.

Provided are a resist compound, a method of forming a pattern by using the same, and a method of manufacturing a semiconductor device using the same. According to the present disclosure, the compound may be represented by Formula 1:

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A plasma processing method includes: providing a substrate including: (a) an etching target film; (b) a photoresist film on an upper surface of the etching target film, having a side surface that defines at least one opening in the upper surface of the etching target film; and (c) a first film including a first portion on an upper surface of the photoresist film and second portion on the side surface of the photoresist film, the first portion having a film thickness larger than that of the second portion; and trimming at least a part of the side surface of the photoresist film and at least a part of the second portion of the first film.

The invention describes a fabricating method for fabricating semiconductor package device which includes the following steps: providing a wafer having a plurality of dies, wherein each of the dies is provided on a top surface thereof with a middle electric conducting structure and a solder ball; forming a molding structure having a flat top surface on a top side of the wafer; removing a part of the molding structure and exposing a part of each of the solder ball by plasma etching; performing a dicing process along a boundary of each of the dies to separate each of the dies so that the semiconductor package device is thus obtained.

Method for producing coating composition applied to patterned resist film in lithography process for solvent development to reverse pattern. The method including: step obtaining hydrolysis condensation product by hydrolyzing and condensing hydrolyzable silane in non-alcoholic hydrophilic solvent; step of solvent replacement wherein non-alcoholic hydrophilic solvent replaced with hydrophobic solvent for hydrolysis condensation product. Method for producing semiconductor device, including: step of applying resist composition to substrate and forming resist film; step of exposing and developing formed resist film; step applying composition obtained by above production method to patterned resist film obtained during or after development in step, forming coating film between patterns; step of removing patterned resist film by etching and reversing patterns. Production method that exposure is performed using ArF laser (with wavelength of 193 nm) or EUV (with wavelength of 13.5 nm). Production method that development is negative development with organic solvent.

A semiconductor processing system includes a layout database that stores a plurality of layouts indicating features to be formed in a wafer. The semiconductor processing system includes a layout analyzer that analyzes the layouts and determines, for each layout, whether a non-perpendicular particle bombardment process should be utilized in conjunction with a photolithography process for forming the features of the layout in a wafer.