Embodiments of SiC devices and corresponding methods of manufacture are provided. In some embodiments, the SiC device has shielding regions at the bottom of some gate trenches and non-linear junctions formed with the SiC material at the bottom of other gate trenches. In other embodiments, the SiC device has the shielding regions at the bottom of the gate trenches and arranged in rows which run in a direction transverse to a lengthwise extension of the trenches. In still other embodiments, the SiC device has the shielding regions and the non-linear junctions, and wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.

A semiconductor device is proposed. A trench gate structure extends from a first surface into a silicon carbide semiconductor body along a vertical direction. A trench contact structure extends from the first surface into the silicon carbide semiconductor body along the vertical direction. A source region of a first conductivity type and a body region of a second conductivity type adjoin a first sidewall of the trench gate structure. A diode region of the second conductivity type adjoins a second sidewall of the trench gate structure opposite to the first sidewall. A shielding region of the second conductivity type adjoins a bottom of the trench contact structure, the shielding region being arranged at a lateral distance to the trench gate structure.

In a Schottky barrier diode region, a Schottky barrier diode is formed between an n-type drift layer and a metal layer, and in a body diode region, a p-type semiconductor region, a p-type semiconductor region, and a p-type semiconductor region are formed in order from a main surface side in the drift layer, and a body diode is formed between the p-type semiconductor region and the drift layer. An impurity concentration of the p-type semiconductor region is decreased lower than the impurity concentration of the p-type semiconductor regions, thereby increasing the reflux current flowing through the Schottky barrier diode and preventing the reflux current from flowing through the body diode.

An electric assembly includes an insulated gate bipolar transistor device, a wide-bandgap transistor device electrically connected in parallel with the bipolar transistor device and a control circuit. The control circuit is electrically coupled to a gate terminal of the bipolar transistor device and to a control terminal of the wide-bandgap transistor device. The control circuit is configured to turn on the bipolar transistor device and to turn on the wide-bandgap transistor device at a predefined turn-on delay with respect to a turn-on of the bipolar transistor device.

A wide gap semiconductor device has: a first MOSFET region (M0) having a first gate electrode 10 and a first source region 30 provided in a first well region 20 made of a second conductivity type; a second MOSFET region (M1) provided below a gate pad 100 and having a second gate electrode 110 and a second source region 130 provided in a second well region 120 made of the second conductivity type; and a built-in diode region electrically connected to the second gate electrode 110. The second source region 130 of the second MOSFET region (M1) is electrically connected to the gate pad 100.

A MOSFET according to the present invention includes a semiconductor base substrate having a super junction structure. A gate electrode is on a first main surface side of the semiconductor base substrate by way of a gate insulation film, wherein in a state where a total amount of dopant in an n-type column region differs from a total amount of dopant in a p-type column region, assuming a depth position where an average positive charge density (x) becomes 0 as X.sub.m, assuming a deepest depth position of the surface of the depletion layer on the first main surface side as X.sub.0, assuming a depth position where the reference average positive charge density .sub.0(x) becomes 0 as X.sub.m, and assuming a deepest depth position of the depletion layer on the first main surface side as X.sub.0, a relationship of |X.sub.0X.sub.0|<|X.sub.mX.sub.m| is satisfied.

A semiconductor device having, in a main non-operating region that is free of unit cells of a main semiconductor element, a gate insulating film and a gate electrode of a current sensing portion extending on a front surface of a semiconductor substrate, to thereby form a planar gate structure. A gate capacitance of the planar gate structure is a gate capacitance of the current sensing portion. Directly beneath the planar gate structure, at the front surface of the semiconductor substrate, a structure is provided in which, from a front side of the semiconductor substrate, a p-type region, an n-type region, and a p-type region are stacked, whereby electric field is not applied to the extended portions of the gate insulating film.

A semiconductor device includes a main switching circuit implemented by a first semiconductor element and a second semiconductor element having a semiconductor region of a first conductivity type as a common region, including respectively a first well region of a second conductivity type and a second well region of a second conductivity type provided in an upper portion of the common region, the first semiconductor element being provided with a first source region of the first conductivity type in an upper portion of the first well region, the second semiconductor element being provided with a second source region of the first conductivity type in an upper portion of the second well region; and a drive circuit configured to independently apply a first drive signal and a second drive signal respectively to a control electrode of the first semiconductor element and a control electrode of the second semiconductor element.

In an element region and a non-element region, a silicon carbide semiconductor device includes a drift layer having a first conductivity type provided on a silicon carbide semiconductor substrate. In the element region, the silicon carbide semiconductor device includes a first trench that reaches the drift layer, and a gate electrode provided in the first trench through a gate insulation film and electrically connected to a gate pad electrode. In the non-element region, the silicon carbide semiconductor device includes a second trench whose bottom surface reaches the drift layer, a second relaxation region having a second conductivity type disposed below the second trench, an inner-surface insulation film provided on a side surface and on the bottom surface of the second trench, and a low-resistance region provided in the second trench through the inner-surface insulation film and electrically insulated from the gate pad electrode.

An embodiment of a semiconductor device includes a plurality of transistor sections separated from each other and a plurality of diode sections separated from each other. Each transistor section includes an emitter electrode and a collector electrode. Each diode section includes an anode electrode and a cathode electrode. Each transistor section is electrically coupled to a common gate pad. A ratio between an active transistor part and an active diode part of the semiconductor device is adjustable by activating a first number of the transistor sections by selectively contacting the emitter electrodes and the collector electrodes of the first number of transistor sections, and by activating a second number of the diode sections by selectively contacting the anode electrodes and the cathode electrodes of the second number of diode sections.