A semiconductor device having a silicon-on-insulator (SOI) structure in which a source region and a drain region extend along a longitudinal direction that is a direction along a longer side of sides facing each other, and are disposed side-by-side in a lateral direction that is a direction perpendicular to the longitudinal direction. In a plan view, a body region extends along the longitudinal direction and is surrounded by a drift region and an insulating region. A space between the insulating region and the body region in the lateral direction becomes narrower from the center to the end of the body region in the longitudinal direction. This achieves high breakdown voltage in the semiconductor device.

A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.

A high voltage thin-film transistor is specified comprising a gate electrode (G11, G21) in a gate electrode layer (31), a semiconductive channel (C11,C12) in a channel layer (34) parallel to the gate electrode layer and being electrically insulated from the gate electrode by a gate dielectric layer (32). The transistor further comprises a dominant main electrode and a subordinate main electrode (M11, M12). The main electrodes each have an external portion (M11e, M12e) in a main electrode layer (36) and an internal portion (M11e, M12e) that protrudes through a further dielectric layer (35) between the main electrode layer and the channel layer to electrically contact the semiconductive channel in a dominant main electrode contact area (M11c) and a subordinate main electrode contact area (M12c) respectively. A first distance (D1) is defined between a side of the dominant main electrode contact area facing the subordinate main electrode contact area and a side of the external portion of the dominant main electrode facing the external portion of the subordinate main electrode. A second distance (D2) is defined between a side of the subordinate main electrode contact area facing the dominant main electrode contact area and a side of the external portion of the subordinate main electrode facing the external portion of the dominant main electrode, wherein the first distance is at least twice as large as the second distance.

A semiconductor device and a method for forming such are provided, the device including: a substrate, a plurality of parallel active semiconductor patterns that extend through a drain-side region and a source-side region, a metal drain contact in the drain-side region, an active gate pattern, a first dummy gate pattern, and a second dummy gate pattern that all extend across the active semiconductor patterns, and a metal interconnect structure located in a region between the first and the second dummy gate patterns. The active semiconductor patterns are doped with a dopant in portions exposed by the dummy gates in dummy gate regions that include the gate cut regions of the first and second dummy gate patterns. The metal interconnect structure connects each of a second subset of the active semiconductor patterns to a respective at least one of a first subset of the active semiconductor patterns.

A thin film transistor, a manufacturing method thereof, an array substrate and a display device are disclosed. The thin film transistor includes an active layer, as well as a source and a drain above the active layer, wherein the active layer includes a carrier trapping portion configured to trap photo-generated majority carriers.

A thin film transistor includes an active layer including a channel portion; a gate electrode spaced apart from the active layer and overlapping at least a part of the active layer; and source and drain electrodes connected with the active layer and spaced apart from each other, wherein the channel portion includes, a first boundary portion connected with one of the source and drain electrodes; a second boundary portion connected with the other one of the source and drain electrodes; and a main channel portion interposed between the first boundary portion and the second boundary portion, and wherein at least a part of the second boundary portion has a thickness smaller than a thickness of the main channel portion.

A thin film transistor includes an oxide semiconductor layer on a substrate. The oxide semiconductor layer includes a channel portion, a first channel connecting portion connected to a first end of the channel portion, and a second channel connecting portion connected to a second end of the channel portion. A thickness of the second channel connecting portion is different from a thickness of the first channel connecting portion. The first end of the channel portion has a same thickness as the thickness of the first channel connecting portion, and the second end of the channel portion has a same thickness as the thickness of the second channel connecting portion.

A method of constructing an integrated circuit (IC) includes fabricating a metal oxide semiconductor field effect transistor (MOSFET) on a first surface of an insulator layer of the integrated circuit. The insulator layer is supported by a sacrificial substrate. The MOSFET includes an extended drain region. The method deposits a front-side dielectric layer on the MOSFET, bonds a handle substrate to the front-side dielectric layer, and then removes the sacrificial substrate. The method also fabricates multiple back gates on a second surface of the insulator layer. The second surface is opposite the first surface.

It is an object of the present invention to provide a switch element and a load driving apparatus capable of suppressing a characteristic change of an on-resistance without lowering an off-breakdown voltage. The switching element includes a control electrode, an active element region, and an inactive element region, and the active element region and the inactive element region are formed adjacent to each other on the control electrode. Alternatively, in the load driving apparatus including a current driving switch element and a current detecting switch element that is connected in parallel to the load driving switch element and that detects an energization current of the load driving switch element, the current detecting switch element includes at least a control electrode, an active element region, and an inactive element region, and the active element region and the inactive element region are formed adjacent to each other on the control electrode.

A semiconductor device is provided. The semiconductor device includes a substrate, an oxide layer disposed over the substrate, and a first epitaxial layer disposed over the oxide layer. The first epitaxial layer has the first conductivity type. The semiconductor device also includes a second epitaxial layer disposed over the first epitaxial layer and a third epitaxial layer disposed over the second epitaxial layer. The second epitaxial layer has a second conductivity type that is opposite to the first conductivity type. The third epitaxial layer has the first conductivity type.