The present invention provides a thin-film transistor and a manufacturing method thereof. The manufacturing method of the thin-film transistor according to the present invention is such that by forming a first photoresist layer on an active layer and using a mask associated with the active layer to pattern the first photoresist layer so as to form the first photoresist pattern, the first photoresist pattern so formed provides protection of the active layer against corrosion caused by acidic etchant solution in the subsequently conducted etching operation of source and drain electrodes so as to function as an etching stopper layer and further, a major portion of the first photoresist pattern can be removed in a photolithographic process of the source and drain electrodes so that only a minor portion is left in the finally-formed thin-film transistor and does not affect the properties of the thin-film transistor. The thin-film transistor according to the present invention has a simple manufacturing process and a low manufacturing cost and the surface of the active layer is flat and smooth. The thin-film transistor shows excellent properties.

A light emitting diode display substrate, a method of manufacturing the same, and a display device are provided. The method includes: forming a planarization layer and a photoresist layer in sequence on a substrate on which a thin film transistor is formed, a light sensitivity of the planarization layer being higher than a light sensitivity of the photoresist layer; etching the planarization layer and the photoresist layer simultaneously, such that a pixel defining pattern is formed through a removed portion of the photoresist layer, and an anode via pattern is formed at a position of the planarization layer corresponding to the pixel defining pattern; forming an anode pattern layer on the substrate on which the above steps were performed, wherein the anode pattern layer comprises a plurality of anodes, such that the planarization layer located at edges of the anode via pattern covers edges of the anodes.

A display device includes a pixel including a first transistor, and a driving circuit including a second transistor. The first transistor includes a first active layer including first source and drain regions apart from each other with a first channel region therebetween, a first gate insulating layer on the first active layer and covering the first channel, source and drain regions, and a first gate electrode on the first gate insulating layer and overlapping the first channel region. The second transistor includes a second active layer including second source and drain regions apart from each other with a second channel region therebetween, a second gate insulating layer on a part of the second active layer including the second channel region and exposing the second source and drain regions, and a second gate electrode disposed on the second gate insulating layer and overlapping the second channel region.

Present application provides a method of manufacturing a semiconductor structure, including forming a well, forming a gate electrode over the well, implanting a lightly doped region in a first side of the well, implanting a first drain in the lightly doped region by a first depth, implanting a second drain in the lightly doped region by a second depth, implanting a source in a second side of the well, the second side being opposite to the first side. The second depth is greater than the first depth. The gate electrode is formed to cover a part of the lightly doped region and a part of the first drain.

Present application provides a method of manufacturing a semiconductor structure, including forming a well, forming a gate electrode over the well, implanting a lightly doped region in a first side of the well, implanting a first drain in the lightly doped region by a first depth, implanting a second drain in the lightly doped region by a second depth, implanting a source in a second side of the well, the second side being opposite to the first side. The second depth is greater than the first depth. The gate electrode is formed to cover a part of the lightly doped region and a part of the first drain.

A semiconductor device includes at least one thin film transistor (100, 200), the at least one thin film transistor including a semiconductor layer (3A, 3B) which includes a channel region (31A, 31), a high-concentration impurity region, and a low-concentration impurity region (32A, 32B) which is located between the channel region and the high-concentration impurity region, a gate electrode (7A, 7B) provided on a gate insulating layer (5), an interlayer insulating layer (11) provided on the gate electrode, and a source electrode (8A, 8B) and a drain electrode (9A, 9B), wherein the interlayer insulating layer and the gate insulating layer have a contact hole extending to the semiconductor layer, at least one of the source electrode (8A, 8B) and the drain electrode (9A, 9B) being in contact with the high-concentration impurity region inside the contact hole, at a side wall of the contact hole, a side surface of the gate insulating layer is aligned with a side surface of the interlayer insulating layer, and at an upper surface of the semiconductor layer, an edge of the contact hole aligned with an edge of the high-concentration impurity region.

A novel semiconductor device including an oxide semiconductor is provided. In particular, a planar semiconductor device including an oxide semiconductor is provided. A semiconductor device including an oxide semiconductor and having large on-state current is provided. The semiconductor device includes an oxide insulating film, an oxide semiconductor film over the oxide insulating film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a gate insulating film between the source electrode and the drain electrode, and a gate electrode overlapping the oxide semiconductor film with the gate insulating film. The oxide semiconductor film includes a first region overlapped with the gate electrode and a second region not overlapped with the gate electrode, the source electrode, and the drain electrode. The first region and the second region have different impurity element concentrations. The gate electrode, the source electrode, and the drain electrode contain the same metal element.

A light emitting diode display substrate, a method of manufacturing the same, and a display device are provided. The method includes: forming a planarization layer and a photoresist layer in sequence on a substrate on which a thin film transistor is formed, a light sensitivity of the planarization layer being higher than a light sensitivity of the photoresist layer; etching the planarization layer and the photoresist layer simultaneously, such that a pixel defining pattern is formed through a removed portion of the photoresist layer, and an anode via pattern is formed at a position of the planarization layer corresponding to the pixel defining pattern; forming an anode pattern layer on the substrate on which the above steps were performed, wherein the anode pattern layer comprises a plurality of anodes, such that the planarization layer located at edges of the anode via pattern covers edges of the anodes.

The present invention provides a manufacture method of a TFT substrate and a manufactured TFT substrate. In the manufacture method of the TFT substrate according to the present invention, by locating the first lightly doped offset region and the second lightly doped offset region in the TFT, the off state current of the TFT can be reduced; meanwhile, by utilizing the first gate and the second gate to compose the dual gate structure, the influence of the first lightly doped offset region and the second lightly doped offset region to the TFT on state current can be reduced, and the first gate and the second gate are connected, and controlled by the same gate voltage, and no additional voltage is required; the structure is simple and the electrical property is excellent, and the manufactured TFT substrate possesses the better electrical property.

The present disclosure provides an array substrate, a manufacturing method thereof and a display device. The array substrate includes an active layer, a gate insulating layer and a gate electrode layer formed sequentially on a base substrate. The active layer includes a first heavily-doped region, a first lightly-doped region, a first non-doped region, a second lightly-doped region, a second non-doped region, a third lightly-doped region and a second heavily-doped region which are sequentially arranged in a horizontal direction.