H01L2224/293

Multi-zone radio frequency transistor amplifiers

RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

Multi-zone radio frequency transistor amplifiers

RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

Sacrificial redistribution layer in microelectronic assemblies having direct bonding

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first direct bonding region, wherein the first direct bonding region includes first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component having a second direct bonding region and coupled to the first microelectronic component by the first and second direct bonding regions, wherein the second direct bonding region includes second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, and wherein individual first metal contacts in the first direct bonding region are coupled to respective individual second metal contacts in the second direct bonding region; and a void between an individual first metal contact and a respective individual second metal contact.

Sacrificial redistribution layer in microelectronic assemblies having direct bonding

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first direct bonding region, wherein the first direct bonding region includes first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component having a second direct bonding region and coupled to the first microelectronic component by the first and second direct bonding regions, wherein the second direct bonding region includes second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, and wherein individual first metal contacts in the first direct bonding region are coupled to respective individual second metal contacts in the second direct bonding region; and a void between an individual first metal contact and a respective individual second metal contact.

COMPOSITION FOR PROVISIONAL FIXATION AND METHOD FOR PRODUCING BONDED STRUCTURE
20220380639 · 2022-12-01 ·

A temporary fixing composition is provided that is used to temporarily fix a first bonding target material and a second bonding target material to each other before the two bonding target materials are bonded to each other. The temporary fixing composition contains a first organic component having a viscosity of less than 70 mPa.Math.s at 25° C. and a boiling point of 200° C. or lower and a second organic component having a viscosity of 70 mPa.Math.s or greater at 25° C. and a boiling point of 210° C. or higher. It is preferable that, when thermogravimetry-differential thermal analysis is performed under the conditions at a temperature increase rate of 10° C./min in a nitrogen atmosphere with a sample mass of 30 mg, the 95% mass reduction temperature is lower than 300° C.

ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME
20220386476 · 2022-12-01 ·

An electronic device includes a display panel having first pads, a circuit board that includes second pads corresponding to the first pads, and a conductive adhesive member disposed between the display panel and the circuit board to connect the first pads and the second pads, in which the conductive adhesive member includes a first resin layer adjacent to the display panel, a second resin layer disposed between the first resin layer and the circuit board and having a curing agent different from that of the first resin layer, and conductive particles disposed in the first resin layer wherein at least one of the second pads protrudes through the second resin layer and is in contact with the conductive particles.

ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME
20220386476 · 2022-12-01 ·

An electronic device includes a display panel having first pads, a circuit board that includes second pads corresponding to the first pads, and a conductive adhesive member disposed between the display panel and the circuit board to connect the first pads and the second pads, in which the conductive adhesive member includes a first resin layer adjacent to the display panel, a second resin layer disposed between the first resin layer and the circuit board and having a curing agent different from that of the first resin layer, and conductive particles disposed in the first resin layer wherein at least one of the second pads protrudes through the second resin layer and is in contact with the conductive particles.

Liquid cooling through conductive interconnect

Embodiments include semiconductor packages and cooling semiconductor packaging systems. A semiconductor package includes a second die on a package substrate, first dies on the second die, conductive bumps between the first dies and the second die, a cold plate and a manifold over the first dies, second die, and package substrate, and first openings in the manifold. The first openings are fluidly coupled through the conductive bumps. The semiconductor package may include a first fluid path through the first openings of the manifold, where a first fluid flows through the first fluid path. The semiconductor package may further include a second fluid path through second openings of the cold plate, where a second fluid flows through the second fluid path, and where the first and second fluids of the first and second fluid paths cool heat providing surfaces of the first dies, the second die, or the package substrate.

Liquid cooling through conductive interconnect

Embodiments include semiconductor packages and cooling semiconductor packaging systems. A semiconductor package includes a second die on a package substrate, first dies on the second die, conductive bumps between the first dies and the second die, a cold plate and a manifold over the first dies, second die, and package substrate, and first openings in the manifold. The first openings are fluidly coupled through the conductive bumps. The semiconductor package may include a first fluid path through the first openings of the manifold, where a first fluid flows through the first fluid path. The semiconductor package may further include a second fluid path through second openings of the cold plate, where a second fluid flows through the second fluid path, and where the first and second fluids of the first and second fluid paths cool heat providing surfaces of the first dies, the second die, or the package substrate.

Flexible circuit film bonding apparatus and method of bonding flexible circuit film using the same

A flexible circuit film bonding apparatus includes: a stage configured to support a TFT substrate; a pressing head configured to press and heat a flexible circuit film attached on the TFT substrate with an anisotropic conductive film interposed therebetween; a backup plate configured to support and heat the TFT substrate positioned below the flexible circuit film; and a heating control unit configured to control a temperature of a lower surface of the pressing head and an upper surface of the backup plate, wherein the temperature of the upper surface of the backup plate is less than 170 degrees Celsius.