An anisotropic conductive film in which conductive particles are disposed in an insulating resin layer has a particle disposition of the conductive particles such that a first orthorhombic lattice region being formed by arranging a plurality of arrangement axes of the conductive particles, disposed in an a direction at a predetermined pitch, in a b direction inclined with respect to the a direction at an angle, and a second orthorhombic lattice region being formed by arranging a plurality of arrangement axes of the conductive particles, disposed in the a direction at a predetermined pitch, in a c direction obtained by inverting the b direction with respect to the a direction are repeatedly disposed.

An anisotropic conductive film in which conductive particles are disposed in an insulating resin layer has a particle disposition of the conductive particles such that a first orthorhombic lattice region being formed by arranging a plurality of arrangement axes of the conductive particles, disposed in an a direction at a predetermined pitch, in a b direction inclined with respect to the a direction at an angle, and a second orthorhombic lattice region being formed by arranging a plurality of arrangement axes of the conductive particles, disposed in the a direction at a predetermined pitch, in a c direction obtained by inverting the b direction with respect to the a direction are repeatedly disposed.

A chip package structure is provided. The chip package structure includes a substrate. The chip package structure also includes a first chip structure and a second chip structure over the substrate. The chip package structure further includes an anti-warpage bar over a first portion of the first chip structure and over a second portion of the second chip structure. A width of the anti-warpage bar overlapping the second portion of the second chip structure is greater than a width of the anti-warpage bar overlapping the first portion of the first chip structure.

A semiconductor package includes: a first substrate; a second substrate including a semiconductor element formed thereon; a film layer between the first substrate and the second substrate; and a molding member surrounding the second substrate, wherein the film layer includes a crystalline spherical silica filler distributed in a matrix.

Disclosed is an LED assembly having an omnidirectional light field. The LED assembly has a transparent substrate with first and second surfaces facing to opposite orientations respectively. LED chips are mounted on the first surface and are electrically interconnected by a circuit. A transparent capsule with a phosphor dispersed therein is formed on the first surface and substantially encloses the circuit and the LED chips. First and second electrode plates are formed on the first or second surface, and electrically connected to the LED chips.

A chip package structure includes at least one semiconductor die attached to a redistribution structure, a first underfill material portion located between the redistribution structure and the at least one semiconductor die and laterally surrounding the solder material portions, a molding compound laterally surrounding at least one semiconductor die, and a second underfill material portion contacting sidewalls of the redistribution structure and sidewalls of the molding compound and including at least one cut region. The second underfill material portion includes a vertically-extending portion having a uniform lateral width and a horizontally-extending portion having a uniform vertical thickness and adjoined to a bottom end of the vertically-extending portion within each of the at least one cut region.

A semiconductor package includes: a package substrate; a semiconductor chip mounted above the package substrate; a chip connection terminal interposed between the semiconductor chip and the package substrate; an adhesive layer disposed on the package substrate and that covers a side and a top surface of the semiconductor chip and surrounds the chip connection terminal between the semiconductor chip and the package substrate; a molding layer disposed on the package substrate and that surrounds the adhesive layer; an interposer mounted on the adhesive layer and the molding layer, where the interposer includes an interposer substrate; and a conductive pillar disposed on the package substrate, where the conductive pillar surrounds the side of the semiconductor substrate, penetrates the molding layer in a vertical direction and connects the package substrate to the interposer substrate.

Embodiments for a packaged semiconductor device and methods of making are provided herein, where a packaged semiconductor device includes a package body having a recess in which a pressure sensor is exposed; a polymeric gel within the recess that vertically and laterally surrounds the pressure sensor; and a protection layer including a plurality of beads embedded within a top region of the polymeric gel.

Embodiments for a packaged semiconductor device and methods of making are provided herein, where a packaged semiconductor device includes a package body having a recess in which a pressure sensor is exposed; a polymeric gel within the recess that vertically and laterally surrounds the pressure sensor; and a protection layer including a plurality of beads embedded within a top region of the polymeric gel.

The present disclosure relates to a method for manufacturing a semiconductor package including vacuum-laminating a non-conductive film on a substrate on which a plurality of through silicon vias are provided and bump electrodes are formed, and then performing UV irradiation, wherein an increase in melt viscosity before and after UV irradiation can be adjusted to 30% or less, whereby a bonding can be performed without voids during thermo-compression bonding, and resin-insertion phenomenon between solders can be prevented, fillets can be minimized and reliability can be improved.