Patent classifications
H01L2224/29218
HYBRID BONDING MATERIALS COMPRISING BALL GRID ARRAYS AND METAL INVERSE OPAL BONDING LAYERS, AND POWER ELECTRONICS ASSEMBLIES INCORPORATING THE SAME
A hybrid bonding layer includes a metal inverse opal (MIO) layer with a plurality of hollow spheres and a predefined porosity, and a ball grid array (BGA) disposed within the MIO layer. The MIO layer and the BGA may be disposed between a pair of bonding layers. The MIO layer and the BGA each have a melting point above a TLP sintering temperature and the pair of bonding layers each have a melting point below the TLP sintering temperature such that the hybrid bonding layer can be transient liquid phase bonded between a substrate and a semiconductor device. The pair of bonding layers may include a first pair of bonding layers with a melting point above the TLP sintering temperature and a second pair of bonding layers with a melting point below the TLP sintering temperature.
SINTERING PASTES WITH HIGH METAL LOADING FOR SEMICONDUCTOR DIE ATTACH APPLICATIONS
A semiconductor die attach composition with greater than 60% metal volume after thermal reaction having: (a) 80-99 wt % of a mixture of metal particles comprising 30-70 wt % of a lead-free low melting point (LMP) particle composition comprising at least one LMP metal Y that melts below a temperature T1, and 25-70 wt % of a high melting point (HMP) particle composition comprising at least one metallic element M that is reactive with the at least one LMP metal Y at a process temperature T1, wherein the ratio of wt % of M to wt % of Y is at least 1.0; (b) 0-30 wt % of a metal powder additive A; and (c) a fluxing vehicle having a volatile portion, and not more than 50 wt % of a non-volatile portion.
Diffusion soldering with contaminant protection
A semiconductor assembly includes a substrate including a metal die attach surface, a semiconductor die that is arranged on the substrate, the semiconductor die being configured as a power semiconductor device and comprising a semiconductor body, a rear side metallization, and a front side layer stack, the front side layer stack comprising a front side metallization and a contaminant protection layer that is between the front side metallization and the semiconductor body, and a diffusion soldered joint between the metal die attach surface and the rear side metallization, the diffusion soldered joint comprising one or more intermetallic phases throughout the diffusion soldered joint, wherein the contaminant protection layer is configured to prevent transmission of contaminants into the semiconductor body.
Laminated composite made up of an electronic substrate and a layer arrangement comprising a reaction solder
Laminated composite (10) comprising at least one electronic substrate (11) and an arrangement of layers (20, 30) made up of at least a first layer (20) of a first metal and/or a first metal alloy and of a second layer (30) of a second metal and/or a second metal alloy adjacent to this first layer (20), wherein the melting temperatures of the first and second layers are different, and wherein, after a thermal treatment of the arrangement of layers (20, 30), a region with at least one intermetallic phase (40) is formed between the first layer and the second layer, wherein the first layer (20) or the second layer (30) is formed by a reaction solder which consists of a mixture of a basic solder with an AgX, CuX or NiX alloy, wherein the component X of the AgX, CuX or NiX alloy is selected from the group consisting of B, Mg, Al, Si, Ca, Se, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Ag, In, Sn, Sb, Ba, Hf, Ta, W, Au, Bi, La, Ce, Pr, Nd, Gd, Dy, Sm, Er, Tb, Eu, Ho, Tm, Yb and Lu and wherein the melting temperature of the AgX, CuX or NiX alloy is greater than the melting temperature of the basic solder. The invention also relates to a method for forming a laminated composite (10) and to a circuit arrangement containing a laminated composite (10) according to the invention.
Joint material, and jointed body
Disclosed is a jointed body wherein multiple base members are jointed to each other through a jointing layer, and at least one of the base members is a base member of a ceramic material, semiconductor or glass. The joint material layer contains a metal and an oxide. The oxide contains V and Te, and is present between the metal and the base members. Disclosed is also a joint material in the form of a paste containing an oxide glass containing V and Te, metal particles, and a solvent; in the form of a foil piece or plate in which particles of an oxide glass containing V and Te are embedded; or in the form of a foil piece or plate containing a layer of an oxide glass containing V and Te, and a layer of a metal.
Joint material, and jointed body
Disclosed is a jointed body wherein multiple base members are jointed to each other through a jointing layer, and at least one of the base members is a base member of a ceramic material, semiconductor or glass. The joint material layer contains a metal and an oxide. The oxide contains V and Te, and is present between the metal and the base members. Disclosed is also a joint material in the form of a paste containing an oxide glass containing V and Te, metal particles, and a solvent; in the form of a foil piece or plate in which particles of an oxide glass containing V and Te are embedded; or in the form of a foil piece or plate containing a layer of an oxide glass containing V and Te, and a layer of a metal.