H01L2224/29387

ANISOTROPIC CONDUCTIVE FILM INCLUDING A REFLECTIVE LAYER

An anisotropic conductive film (ACF) is disclosed. In one approach, the ACF includes a non-reflective adhesive layer including a top surface, a plurality of conductive particles included with the non-reflective adhesive layer, and a reflective adhesive layer disposed along the top surface of the non-reflective adhesive layer.

SEMICONDUCTOR PACKAGE
20220045010 · 2022-02-10 ·

A semiconductor package includes a first sub-semiconductor device, an interposer, and a second sub-semiconductor device stacked on each other, and a heat sink covering the second sub-semiconductor device. The first sub-semiconductor device includes a first substrate and a first semiconductor chip. The interposer includes a dielectric layer, a thermal conductive layer in contact with a bottom surface of the dielectric layer, a first thermal conductive pad in contact with a top surface of the dielectric layer, and thermal conductive vias penetrating the dielectric layer to connect the thermal conductive layer to the first thermal conductive pad. A bottom surface of the thermal conductive layer is adjacent to and connected to a top surface of the first semiconductor chip. The second sub-semiconductor device is disposed on the dielectric layer without overlapping the first thermal conductive pad. The heat sink further covers the first thermal conductive pad to be connected thereto.

Adhesive for mounting flip chip for use in a method for producing a semiconductor device

The present invention aims to provide a method for producing a semiconductor device, the method being capable of achieving high reliability by suppressing voids. The present invention also aims to provide a flip-chip mounting adhesive for use in the method for producing a semiconductor device. The present invention relates to a method for producing a semiconductor device, including: step 1 of positioning a semiconductor chip on a substrate via an adhesive, the semiconductor chip including bump electrodes each having an end made of solder; step 2 of heating the semiconductor chip at a temperature of the melting point of the solder or higher to solder and bond the bump electrodes of the semiconductor chip to an electrode portion of the substrate, and concurrently to temporarily attach the adhesive; and step 3 of removing voids by heating the adhesive under a pressurized atmosphere, wherein the adhesive has an activation energy ΔE of 100 kJ/mol or less, a reaction rate of 20% or less at 2 seconds at 260° C., and a reaction rate of 40% or less at 4 seconds at 260° C., as determined by differential scanning calorimetry and Ozawa method.

Adhesive for mounting flip chip for use in a method for producing a semiconductor device

The present invention aims to provide a method for producing a semiconductor device, the method being capable of achieving high reliability by suppressing voids. The present invention also aims to provide a flip-chip mounting adhesive for use in the method for producing a semiconductor device. The present invention relates to a method for producing a semiconductor device, including: step 1 of positioning a semiconductor chip on a substrate via an adhesive, the semiconductor chip including bump electrodes each having an end made of solder; step 2 of heating the semiconductor chip at a temperature of the melting point of the solder or higher to solder and bond the bump electrodes of the semiconductor chip to an electrode portion of the substrate, and concurrently to temporarily attach the adhesive; and step 3 of removing voids by heating the adhesive under a pressurized atmosphere, wherein the adhesive has an activation energy ΔE of 100 kJ/mol or less, a reaction rate of 20% or less at 2 seconds at 260° C., and a reaction rate of 40% or less at 4 seconds at 260° C., as determined by differential scanning calorimetry and Ozawa method.

Resin composition, resin sheet, and production method for semiconductor device

Provided is a resin sheet, wherein in a stress measurement in which a dynamic shear strain is applied in a direction parallel to a surface, the difference between a loss tangent as measured when a strain amplitude is 10% of the sheet thickness and a loss tangent as measured when the amplitude is 0.1% is equal to or greater than 1 at a temperature of 80° C. and a frequency of 0.5 Hz. The resin sheet of the present invention can provide a semiconductor device with excellent connection reliability, wherein air bubbles and cracks are less likely to occur in the resin sheet. In the resin composition of the present invention, aggregates are less likely to occur during storage. The resin sheet obtained by forming the resin composition into a sheet has good flatness. The hardened material thereof can provide a circuit board or a semiconductor device with high connection reliability.

Resin composition, resin sheet, and production method for semiconductor device

Provided is a resin sheet, wherein in a stress measurement in which a dynamic shear strain is applied in a direction parallel to a surface, the difference between a loss tangent as measured when a strain amplitude is 10% of the sheet thickness and a loss tangent as measured when the amplitude is 0.1% is equal to or greater than 1 at a temperature of 80° C. and a frequency of 0.5 Hz. The resin sheet of the present invention can provide a semiconductor device with excellent connection reliability, wherein air bubbles and cracks are less likely to occur in the resin sheet. In the resin composition of the present invention, aggregates are less likely to occur during storage. The resin sheet obtained by forming the resin composition into a sheet has good flatness. The hardened material thereof can provide a circuit board or a semiconductor device with high connection reliability.

Thermocompression for semiconductor chip assembly

An assembly of a semiconductor chip having pads to a substrate having pads aligned to receive the semiconductor chip is provided, whereby at least one of the semiconductor chip pads and substrate pads include solder bumps. The solder bumps are deformed against the substrate pads and the semiconductor chip pads, whereby an underfill material is applied to fill the gap between the semiconductor chip and substrate. The underfill material does not penetrate between the deformed solder bumps, the semiconductor chip pads, and the substrate pads. At least one of the solder bumps have not been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads, and at least another one of the solder bumps have been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads.

System and method for manufacturing a fabricated carrier
09735032 · 2017-08-15 · ·

A method of fabricating a BGA carrier, the method comprising combining a conductive portion and a molded dielectric portion, the dielectric portion having a top surface, a bottom surface and an inner surface, the inner surface intersecting said top surface and said bottom surface, the inner surface forming a cavity for receiving a semiconductor die; selectively bonding the semiconductor die to a top surface of the conductive portion; selectively etching part of the conductive portion; and applying solder resist to a bottom surface of the conductive portion.

Semiconductor packaging structure and process

A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.

Semiconductor packaging structure and process

A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.