H01L2224/13313

Semiconductor device and method of embedding circuit pattern in encapsulant for SIP module

An SIP module includes a plurality of electrical components mounted to an interconnect substrate. The electrical components and interconnect substrate are covered by an encapsulant. A conductive post is formed through the encapsulant. A plurality of openings is formed in the encapsulant by laser in a form of a circuit pattern. A conductive material is deposited over a surface of the encapsulant and into the openings to form an electrical circuit pattern. A portion of the conductive material is removed by a grinder to expose the electrical circuit pattern. The grinding operation planarizes the surface of the encapsulant and the electrical circuit pattern. The electrical circuit pattern can be a trace, contact pad, RDL, or other interconnect structure. The electrical circuit pattern can also be a shielding layer or antenna. An electrical component is disposed over the SIP module and electrical circuit pattern.

Semiconductor device and method of embedding circuit pattern in encapsulant for SIP module

An SIP module includes a plurality of electrical components mounted to an interconnect substrate. The electrical components and interconnect substrate are covered by an encapsulant. A conductive post is formed through the encapsulant. A plurality of openings is formed in the encapsulant by laser in a form of a circuit pattern. A conductive material is deposited over a surface of the encapsulant and into the openings to form an electrical circuit pattern. A portion of the conductive material is removed by a grinder to expose the electrical circuit pattern. The grinding operation planarizes the surface of the encapsulant and the electrical circuit pattern. The electrical circuit pattern can be a trace, contact pad, RDL, or other interconnect structure. The electrical circuit pattern can also be a shielding layer or antenna. An electrical component is disposed over the SIP module and electrical circuit pattern.

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THEREOF

A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour.

Semiconductor device and a method of manufacturing thereof

A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour.

Method for producing joined structure

A method for producing a joined structure according to the present invention includes: a reflow step of heating a first member and a solder material while keeping them in contact with each other in a reflow chamber to melt a solder alloy constituting the solder material, the reflow step including: a first reflow step of melting the solder alloy with an atmosphere in the reflow chamber reduced to a first pressure P.sub.1 lower than the atmospheric pressure; and a second reflow step of, after the first reflow step, melting the solder alloy with the atmosphere in the reflow chamber reduced to a second pressure P.sub.2 lower than the first pressure P.sub.1.

Method for producing joined structure

A method for producing a joined structure according to the present invention includes: a reflow step of heating a first member and a solder material while keeping them in contact with each other in a reflow chamber to melt a solder alloy constituting the solder material, the reflow step including: a first reflow step of melting the solder alloy with an atmosphere in the reflow chamber reduced to a first pressure P.sub.1 lower than the atmospheric pressure; and a second reflow step of, after the first reflow step, melting the solder alloy with the atmosphere in the reflow chamber reduced to a second pressure P.sub.2 lower than the first pressure P.sub.1.

Advanced solder alloys for electronic interconnects

Improved electrical and thermal properties of solder alloys are achieved by the use of micro-additives in solder alloys to engineer the electrical and thermal properties of the solder alloys and the properties of the reaction layers between the solder and the metal surfaces. The electrical and thermal conductivity of alloys and that of the reaction layers between the solder and the -metal surfaces can be controlled over a wide range of temperatures. The solder alloys produce stable microstructures wherein such stable microstructures of these alloys do not exhibit significant changes when exposed to changes in temperature, compared to traditional interconnect materials.

HYBRID BONDING STRUCTURES, SEMICONDUCTOR DEVICES HAVING THE SAME, AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICES

Provided are a hybrid bonding structure, a solder paste composition, a semiconductor device, and a method of manufacturing the semiconductor device. The hybrid bonding structure includes a solder ball and a solder paste bonded to the solder ball. The solder paste includes a transient liquid phase. The transient liquid phase includes a core and a shell on a surface of the core. A melting point of the shell may be lower than a melting point of the core. The core and the shell are configured to form an intermetallic compound in response to the transient liquid phase at least partially being at a temperature that is within a temperature range of about 20° C. to about 190° C.

HYBRID BONDING STRUCTURES, SEMICONDUCTOR DEVICES HAVING THE SAME, AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICES

Provided are a hybrid bonding structure, a solder paste composition, a semiconductor device, and a method of manufacturing the semiconductor device. The hybrid bonding structure includes a solder ball and a solder paste bonded to the solder ball. The solder paste includes a transient liquid phase. The transient liquid phase includes a core and a shell on a surface of the core. A melting point of the shell may be lower than a melting point of the core. The core and the shell are configured to form an intermetallic compound in response to the transient liquid phase at least partially being at a temperature that is within a temperature range of about 20° C. to about 190° C.

COMPOSITION FOR CONDUCTIVE ADHESIVE, SEMICONDUCTOR PACKAGE COMPRISING CURED PRODUCT THEREOF, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE USING THE SAME

Provided is a composition for conductive adhesive. The composition for conductive adhesive includes a heterocyclic compound containing oxygen and including at least one of an epoxy group or oxetane group, a reductive curing agent including an amine group and a carboxyl group, and a photoinitiator, wherein a mixture ratio of the heterocyclic compound and the reductive curing agent satisfies Conditional Expression 1 below.


0.5≤(b+c)/a≤1.5, a>0, b≥0, c>0  [Conditional Expression 1] where ‘a’ denotes a mole number of a heterocycle in the heterocyclic compound, ‘b’ denotes a mole number of hydrogen bonded to a nitrogen atom of the amine group included in the reductive curing agent, and ‘c’ denotes a mole number of the carboxyl group.