Patent classifications
H01L2224/29305
Apparatus having self healing liquid phase power connects and method thereof
The present invention is directed to a liquid and solid phase power connect for packaging of an electrical device using a using a phase changing metal. The phase changing metal transitions back and forth between a liquid phase and a solid phase while constantly maintaining connection to the electrical device. The packaging uses a substrate, a restraining housing, and a lid to encase an electrical contact on the electrical device and restrain the phase changing metal. In one embodiment, the entire electrical device is encased and a voltage isolator is utilized to limit the contact areas between the phase changing metal and the electrical device. A method for relieving contact stress by transitioning the phase changing metal from a solid to a liquid is also taught.
BONDING FILM, TAPE FOR WAFER PROCESSING, METHOD FOR PRODUCING BONDED BODY, AND BONDED BODY AND PASTED BODY
A bonding film for bonding a semiconductor element and a substrate. The bonding film has an electroconductive bonding layer formed by molding an electroconductive paste including metal fine particles (P) into a film form, and a tack layer having tackiness and laminated on the electroconductive bonding layer. The tack layer includes 0.1% to 1.0% by mass of metal fine particles (M) with respect to the metal fine particles (P) in the electroconductive bonding layer, and the metal fine particles (M) have a melting point of 250° C. or lower.
BONDING FILM, TAPE FOR WAFER PROCESSING, METHOD FOR PRODUCING BONDED BODY, AND BONDED BODY AND PASTED BODY
A bonding film for bonding a semiconductor element and a substrate. The bonding film has an electroconductive bonding layer formed by molding an electroconductive paste including metal fine particles (P) into a film form, and a tack layer having tackiness and laminated on the electroconductive bonding layer. The tack layer includes 0.1% to 1.0% by mass of metal fine particles (M) with respect to the metal fine particles (P) in the electroconductive bonding layer, and the metal fine particles (M) have a melting point of 250° C. or lower.
SOLID METAL FOAM THERMAL INTERFACE MATERIAL
Solid metal foam thermal interface materials and their uses in electronics assembly are described. In one implementation, a method includes: applying a thermal interface material (TIM) between a first device and a second device to form an assembly having a first surface of the TIM in in touching relation with a surface of the first device, and a second surface of the TIM opposite the first surface in touching relation with a surface of the second device, the TIM comprising a solid metal foam and a first liquid metal; and compressing the assembly to form an alloy from the TIM that bonds the first device to the second device.
Alternative compositions for high temperature soldering applications
Invention compositions are a replacement for high melting temperature solder pastes and preforms in high operating temperature and step-soldering applications. In the use of the invention, a mixture of metallic powders reacts below 350 degrees C. to form a dense metallic joint that does not remelt at the original process temperature.
Alternative compositions for high temperature soldering applications
Invention compositions are a replacement for high melting temperature solder pastes and preforms in high operating temperature and step-soldering applications. In the use of the invention, a mixture of metallic powders reacts below 350 degrees C. to form a dense metallic joint that does not remelt at the original process temperature.
HYBRID BACKSIDE THERMAL STRUCTURES FOR ENHANCED IC PACKAGES
An integrated circuit (IC) die structure comprises a substrate material comprising silicon. Integrated circuitry is over a first side of the substrate material. A composite layer is in direct contact with a second side of the substrate material. The second side is opposite the first side. The composite layer comprises a first constituent material associated with a first linear coefficient of thermal expansion (CTE), and a first thermal conductivity exceeding that of the substrate. The composite layer also comprises a second constituent material associated with a second CTE that is lower than the first, and a second thermal conductivity exceeding that of the substrate.
HYBRID BACKSIDE THERMAL STRUCTURES FOR ENHANCED IC PACKAGES
An integrated circuit (IC) die structure comprises a substrate material comprising silicon. Integrated circuitry is over a first side of the substrate material. A composite layer is in direct contact with a second side of the substrate material. The second side is opposite the first side. The composite layer comprises a first constituent material associated with a first linear coefficient of thermal expansion (CTE), and a first thermal conductivity exceeding that of the substrate. The composite layer also comprises a second constituent material associated with a second CTE that is lower than the first, and a second thermal conductivity exceeding that of the substrate.
Encapsulated stress mitigation layer and power electronic assemblies incorporating the same
Encapsulated stress mitigation layers and assemblies having the same are disclosed. An assembly that includes a first substrate, a second substrate, an encapsulating layer disposed between the first and second substrates, and a stress mitigation layer disposed in the encapsulating layer such that the stress mitigation layer is encapsulated within the encapsulating layer. The stress mitigation layer has a lower melting temperature relative to a higher melting temperature of the encapsulating layer. The assembly includes an intermetallic compound layer disposed between the first substrate and the encapsulating layer such that the encapsulating layer is separated from the first substrate by the intermetallic compound layer. The stress mitigation layer melts into a liquid when the assembly operates at a temperature above the low melting temperature of the stress mitigation layer and the encapsulating layer maintains the liquid of the stress mitigation layer within the assembly.
Encapsulated stress mitigation layer and power electronic assemblies incorporating the same
Encapsulated stress mitigation layers and assemblies having the same are disclosed. An assembly that includes a first substrate, a second substrate, an encapsulating layer disposed between the first and second substrates, and a stress mitigation layer disposed in the encapsulating layer such that the stress mitigation layer is encapsulated within the encapsulating layer. The stress mitigation layer has a lower melting temperature relative to a higher melting temperature of the encapsulating layer. The assembly includes an intermetallic compound layer disposed between the first substrate and the encapsulating layer such that the encapsulating layer is separated from the first substrate by the intermetallic compound layer. The stress mitigation layer melts into a liquid when the assembly operates at a temperature above the low melting temperature of the stress mitigation layer and the encapsulating layer maintains the liquid of the stress mitigation layer within the assembly.