Patent classifications
H01L2224/29311
Display panel comprising micro light-emitting diodes and a connection layer comprising conductive particles and method for making same
A micro LED display panel includes a substrate, a plurality of first metal electrodes and a plurality of metal pads on a surface of the substrate, a connection layer on the substrate, a plurality of micro LEDs on a side of the connection layer away from the substrate. The connection layer includes conductive particles. Each of the micro LEDs is coupled to at least one of the first metal electrode. A side of each of the metal pads away from the substrate is coupled to some of the conductive particles in the connection layer to form a metal retaining wall. The metal retaining walls enhance structural strength of the micro LED display panel and avoid breakage of any of the micro LEDs.
Electrical interconnect structure with radial spokes for improved solder void control
An electrical interconnect structure includes a bond pad having a substantially planar bonding surface, and a solder enhancing structure that is disposed on the bonding surface and includes a plurality of raised spokes that are each elevated from the bonding surface. Each of the raised spokes has a lower wettability relative to a liquefied solder material than the bonding surface. Each of the raised spokes extend radially outward from a center of the solder enhancing structure.
Electrical interconnect structure with radial spokes for improved solder void control
An electrical interconnect structure includes a bond pad having a substantially planar bonding surface, and a solder enhancing structure that is disposed on the bonding surface and includes a plurality of raised spokes that are each elevated from the bonding surface. Each of the raised spokes has a lower wettability relative to a liquefied solder material than the bonding surface. Each of the raised spokes extend radially outward from a center of the solder enhancing structure.
Member connection method and adhesive tape
This member connection method includes: a cutting step of forming cutting lines C in an adhesive layer at predetermined intervals at least in a width direction of an adhesive tape and making segments of the adhesive layer divided by the cutting lines C continuous at least in a lengthwise direction of the adhesive tape; a transfer step of disposing the segments to face a connection surface of one member to be connected, pressing a heating and pressing tool having an arbitrary pattern shape against the adhesive tape from a separator side and selectively transferring the segments to the one member to be connected; and a connection step for connecting another member to be connected to the one member to be connected via the segments transferred to the one member to be connected.
Member connection method and adhesive tape
This member connection method includes: a cutting step of forming cutting lines C in an adhesive layer at predetermined intervals at least in a width direction of an adhesive tape and making segments of the adhesive layer divided by the cutting lines C continuous at least in a lengthwise direction of the adhesive tape; a transfer step of disposing the segments to face a connection surface of one member to be connected, pressing a heating and pressing tool having an arbitrary pattern shape against the adhesive tape from a separator side and selectively transferring the segments to the one member to be connected; and a connection step for connecting another member to be connected to the one member to be connected via the segments transferred to the one member to be connected.
Lead-free solder paste with mixed solder powders for high temperature applications
Some implementations of the disclosure relate to a lead-free solder paste with mixed solder powders that is particularly suitable for high temperature soldering applications involving multiple board-level reflow operations. In one implementation, the solder paste consists of 10 wt % to 90 wt % of a first solder alloy powder, the first solder alloy powder consisting of an SnSbCuAg solder alloy that has a wt % ratio of Sn:Sb of 0.75 to 1.1; 10 wt % to 90 wt % of a second solder alloy powder, the second solder alloy powder consisting of an Sn solder alloy including at least 80 wt % of Sn; and a remainder of flux.
Lead-free solder paste with mixed solder powders for high temperature applications
Some implementations of the disclosure relate to a lead-free solder paste with mixed solder powders that is particularly suitable for high temperature soldering applications involving multiple board-level reflow operations. In one implementation, the solder paste consists of 10 wt % to 90 wt % of a first solder alloy powder, the first solder alloy powder consisting of an SnSbCuAg solder alloy that has a wt % ratio of Sn:Sb of 0.75 to 1.1; 10 wt % to 90 wt % of a second solder alloy powder, the second solder alloy powder consisting of an Sn solder alloy including at least 80 wt % of Sn; and a remainder of flux.
SEMICONDUCTOR PACKAGES
A semiconductor package includes a first substrate, a first flow channel and a second flow channel. The first flow channel is on the first substrate. The second flow channel is on the first substrate and in fluid communication with the first flow channel. The second flow channel is spaced from an inlet and an outlet of the first flow channel. The first flow channel and the second flow channel constitute a bonding region of the first substrate.
SEMICONDUCTOR PACKAGES
A semiconductor package includes a first substrate, a first flow channel and a second flow channel. The first flow channel is on the first substrate. The second flow channel is on the first substrate and in fluid communication with the first flow channel. The second flow channel is spaced from an inlet and an outlet of the first flow channel. The first flow channel and the second flow channel constitute a bonding region of the first substrate.
Method for fabricating a semiconductor device comprising a paste layer and semiconductor device
A semiconductor device and method for fabricating a semiconductor device, comprising a paste layer is disclosed. In one example the method comprises attaching a substrate to a carrier, wherein the substrate comprises a plurality of semiconductor dies. A layer of a paste is applied to the substrate. The layer above cutting regions of the substrate is structured. The substrate is cut along the cutting regions.