A metal sintering preparation containing (A) 50 to 90% by weight of at least one metal that is present in the form of particles having a coating that contains at least one organic compound, and (B) 6 to 50% by weight organic solvent. The mathematical product of tamped density and specific surface of the metal particles of component (A) is in the range of 40,000 to 80,000 cm.sup.−1.

A metal sintering preparation containing (A) 50 to 90% by weight of at least one metal that is present in the form of particles having a coating that contains at least one organic compound, and (B) 6 to 50% by weight organic solvent. The mathematical product of tamped density and specific surface of the metal particles of component (A) is in the range of 40,000 to 80,000 cm.sup.−1.

The present invention relates to a conductive composition containing a conductive metal powder and a resin component, in which the conductive metal powder contains at least a metal flake having a crystalline structure in which a metal crystal grows in a flake shape, and the resin component contains an aromatic amine skeleton.

The present invention relates to a conductive composition containing a conductive metal powder and a resin component, in which the conductive metal powder contains at least a metal flake having a crystalline structure in which a metal crystal grows in a flake shape, and the resin component contains an aromatic amine skeleton.

A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.

A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.

A dicing die attach film containing a dicing film and a die attach film stacked on the dicing film, wherein the die attach film contains an organic solvent having a boiling point of 100° C. or more and less than 150° C. and a vapor pressure of 50 mmHg or less, and wherein an amount of the organic solvent in the die attach film satisfies the following (a):

(a) when 1.0 g of the die attach film is immersed in 10.0 mL of acetone at 4° C. for 24 hours, an amount of the organic solvent extracted into the acetone is 800 μg or less.

In accordance with an embodiment of the present invention, a semiconductor device includes a semiconductor chip having a first side and an opposite second side, and a chip contact pad disposed on the first side of the semiconductor chip. A dielectric liner is disposed over the semiconductor chip. The dielectric liner includes a plurality of openings over the chip contact pad. A interconnect contacts the semiconductor chip through the plurality of openings at the chip contact pad.

In accordance with an embodiment of the present invention, a semiconductor device includes a semiconductor chip having a first side and an opposite second side, and a chip contact pad disposed on the first side of the semiconductor chip. A dielectric liner is disposed over the semiconductor chip. The dielectric liner includes a plurality of openings over the chip contact pad. A interconnect contacts the semiconductor chip through the plurality of openings at the chip contact pad.

Thermal interface materials are disclosed that include or are based on thermally reversible gels, such as thermally reversible gelled fluids, oil gels and solvent gel resins. In an exemplary embodiment, a thermal interface material includes at least one thermally conductive filler in a thermally reversible gel.