An anisotropic conductive film includes conductive particles disposed in an insulating resin layer. Zigzag arrangements are arranged at a predetermined pitch in an x direction on an xy plane in a plan view of the anisotropic conductive film with positions thereof in a y direction being periodically altered. The zigzag arrangements each include an arrangement Rb and an arrangement Rc repeatedly provided at predetermined intervals in the y direction. The arrangement Rb includes the conductive particles arranged at a positive inclination, and the arrangement Rc includes the conductive particles arranged at a negative inclination. This configuration can form a pseudo random regular disposition.

A temperature-sensor assembly comprising at least one temperature sensor and at least one supply line, wherein the temperature sensor has at least one electrically insulating substrate with an upper side and an underside, wherein a temperature-sensor structure with at least one sensor-contact surface is formed at least on parts of the upper side, wherein the supply line has at least one supply-line contact surface, wherein the supply-line contact surface is connected to the sensor-contact surface at least in part by means of a first sinter layer.

A temperature-sensor assembly comprising at least one temperature sensor and at least one supply line, wherein the temperature sensor has at least one electrically insulating substrate with an upper side and an underside, wherein a temperature-sensor structure with at least one sensor-contact surface is formed at least on parts of the upper side, wherein the supply line has at least one supply-line contact surface, wherein the supply-line contact surface is connected to the sensor-contact surface at least in part by means of a first sinter layer.

Die-substrate assemblies having sinter-bonded backside via structures, and methods for fabricating such die-substrate assemblies, are disclosed. In embodiments, the method includes obtaining an integrated circuit (IC) die having a backside over which a backmetal layer is formed and into which a plated backside via extends. The IC die is attached to an electrically-conductive substrate by: (i) applying sinter precursor material over the backmetal layer and into the plated backside via; (ii) positioning a frontside of the electrically-conductive substrate adjacent the plated backmetal layer and in contact with the sinter precursor material; and (iii) sintering the sinter precursor material to yield a sintered bond layer attaching and electrically coupling the IC die to the frontside of the electrically-conductive substrate through the backmetal layer and through the plated backside via. The sintered bond layer contacts and is metallurgically bonded to the backside via lining.

Die-substrate assemblies having sinter-bonded backside via structures, and methods for fabricating such die-substrate assemblies, are disclosed. In embodiments, the method includes obtaining an integrated circuit (IC) die having a backside over which a backmetal layer is formed and into which a plated backside via extends. The IC die is attached to an electrically-conductive substrate by: (i) applying sinter precursor material over the backmetal layer and into the plated backside via; (ii) positioning a frontside of the electrically-conductive substrate adjacent the plated backmetal layer and in contact with the sinter precursor material; and (iii) sintering the sinter precursor material to yield a sintered bond layer attaching and electrically coupling the IC die to the frontside of the electrically-conductive substrate through the backmetal layer and through the plated backside via. The sintered bond layer contacts and is metallurgically bonded to the backside via lining.

An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.

An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first substrate including a center region and an edge region distal from the center region, a first circuit layer positioned on the first substrate, a center power pad positioned in the first circuit layer and above the center region, an edge power pad positioned in the first circuit layer, above the edge region, and electrically coupled to the center power pad, a redistribution power pattern positioned above the first circuit layer and electrically coupled to the center power pad, and an edge power via positioned between the edge power pad and the redistribution power pattern, and electrically connecting the edge power pad and the redistribution power pattern. The first substrate, the center power pad, the edge power pad, the redistribution power pattern, and the edge power via together configure a first semiconductor die.

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first substrate including a center region and an edge region distal from the center region, a first circuit layer positioned on the first substrate, a center power pad positioned in the first circuit layer and above the center region, an edge power pad positioned in the first circuit layer, above the edge region, and electrically coupled to the center power pad, a redistribution power pattern positioned above the first circuit layer and electrically coupled to the center power pad, and an edge power via positioned between the edge power pad and the redistribution power pattern, and electrically connecting the edge power pad and the redistribution power pattern. The first substrate, the center power pad, the edge power pad, the redistribution power pattern, and the edge power via together configure a first semiconductor die.

The present invention aims to provide resin particles that have excellent heat resistance and that, when used as base particles of conductive particles, are applicable to mounting by thermocompression bonding at low pressure to produce a connection structure having excellent connection reliability. The present invention also aims to provide conductive particles, a conductive material, and a connection structure each including the resin particles. Provided are resin particles having a 5% weight loss temperature of 350° C. or higher, a 10% K value at 25° C. of 100 N/mm.sup.2 or more and 2,500 N/mm.sup.2 or less, and a 30% K value at 25° C. of 100 N/mm.sup.2 or more and 1,500 N/mm.sup.2 or less.