H01L2224/29444

Methods of forming power electronic assemblies using metal inverse opal structures and encapsulated-polymer spheres

A method of forming a bonding assembly that includes positioning a plurality of polymer spheres against an opal structure and placing a substrate against a second major surface of the opal structure. The opal structure includes the first major surface and the second major surface with a plurality of voids defined therebetween. The plurality of polymer spheres encapsulates a solder material disposed therein and contacts the first major surface of the opal structure. The method includes depositing a material within the voids of the opal structure and removing the opal structure to form an inverse opal structure between the first and second major surfaces. The method further includes removing the plurality of polymer spheres to expose the solder material encapsulated therein and placing a semiconductor device onto the inverse opal structure in contact with the solder material.

Anisotropic conductive film and production method of the same
10849236 · 2020-11-24 · ·

An anisotropic conductive film having a multilayer structure having conductive particles arranged in a single layer has a first connection layer and a second connection layer formed on a surface of the first connection layer. The first connection layer is a photopolymerized resin layer, and the second connection layer is a thermally or photo-cationically, anionically, or radically polymerizable resin layer. On the surface of the first connection layer on a side of the second connection layer, the conductive particles for anisotropic conductive connection are arranged in a single layer, and the first connection layer contains an insulating filler.

Transient liquid phase material bonding and sealing structures and methods of forming same
10840108 · 2020-11-17 · ·

A method of forming a bonding element including a first transient liquid phase (TLP) bonding element including a first material and a second material, the first material having a higher melting point than the second material, a ratio of a quantity of the first material and the second material in the first TLP bonding element having a first value, and a second TLP bonding element including the first material and the second material, a ratio of a quantity of the first material and the second material in the second TLP bonding element having a second value different from the first value.

Transient liquid phase material bonding and sealing structures and methods of forming same
10840108 · 2020-11-17 · ·

A method of forming a bonding element including a first transient liquid phase (TLP) bonding element including a first material and a second material, the first material having a higher melting point than the second material, a ratio of a quantity of the first material and the second material in the first TLP bonding element having a first value, and a second TLP bonding element including the first material and the second material, a ratio of a quantity of the first material and the second material in the second TLP bonding element having a second value different from the first value.

Methods of forming power electronic assemblies using metal inverse opals and cap structures

Methods for forming bonded assemblies using metal inverse opal and cap structures are disclosed. In one embodiment, a method for forming a bonded assembly includes positioning a substrate against a polymer support that is porous, depositing a metal onto and within the polymer support, disposing a cap layer to the polymer support opposite of the substrate to form a bottom electrode, and removing the polymer support from between the substrate and the cap layer to form a metal inverse opal structure disposed therebetween.

Methods of forming power electronic assemblies using metal inverse opals and cap structures

Methods for forming bonded assemblies using metal inverse opal and cap structures are disclosed. In one embodiment, a method for forming a bonded assembly includes positioning a substrate against a polymer support that is porous, depositing a metal onto and within the polymer support, disposing a cap layer to the polymer support opposite of the substrate to form a bottom electrode, and removing the polymer support from between the substrate and the cap layer to form a metal inverse opal structure disposed therebetween.

Display panel, method for manufacturing the display panel, and display device

The present disclosure provides a display panel, a method for manufacturing the display panel, and a display device. The display panel includes a substrate; a printed circuit board; a chip on film; an anisotropic conductive adhesive layer, connected between the chip on film and the substrate, and between the chip on film and the printed circuit board.

Display panel, method for manufacturing the display panel, and display device

The present disclosure provides a display panel, a method for manufacturing the display panel, and a display device. The display panel includes a substrate; a printed circuit board; a chip on film; an anisotropic conductive adhesive layer, connected between the chip on film and the substrate, and between the chip on film and the printed circuit board.

Connection wiring

Provided is connection wiring capable of inhibiting connection defects between bumps and pads at the time of semiconductor chip mounting and also allowing an increase in the number of pads. In an area between a pad row in any stage and a pad row in an adjacent stage, a first line 31 is disposed so as to pass under an adjacent second line 32, or a second line 32 is disposed so as to pass over an adjacent first line 31. In this case, three lines are disposed in any area between pads 20 in each stage such that the three lines include a first line 31 situated in the middle, and second lines 32 are situated so as to have the first line 31 positioned therebetween. Thus, the pitch between the pads 20 can be further reduced without reducing the width of the pads 20.

Connection wiring

Provided is connection wiring capable of inhibiting connection defects between bumps and pads at the time of semiconductor chip mounting and also allowing an increase in the number of pads. In an area between a pad row in any stage and a pad row in an adjacent stage, a first line 31 is disposed so as to pass under an adjacent second line 32, or a second line 32 is disposed so as to pass over an adjacent first line 31. In this case, three lines are disposed in any area between pads 20 in each stage such that the three lines include a first line 31 situated in the middle, and second lines 32 are situated so as to have the first line 31 positioned therebetween. Thus, the pitch between the pads 20 can be further reduced without reducing the width of the pads 20.