A semiconductor device comprising a first metal oxide film, an oxide semiconductor film, a second metal oxide film, a gate insulating film, and a gate electrode is provided. The oxide semiconductor film comprises an InGaZnO-based metal oxide. The second metal oxide film comprises a GaZnO-based metal oxide. An amount of substance of zinc oxide with respect to gallium oxide is lower than 50% in the GaZnO-based metal oxide.

In a semiconductor device including a transistor in which an oxide semiconductor layer, a gate insulating layer, and a gate electrode layer on side surfaces of which sidewall insulating layers are provided are stacked in this order, a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer and the sidewall insulating layers. In a process for manufacturing the semiconductor device, a conductive layer and an interlayer insulating layer are stacked to cover the oxide semiconductor layer, the sidewall insulating layers, and the gate electrode layer. Then, parts of the interlayer insulating layer and the conductive layer over the gate electrode layer are removed by a chemical mechanical polishing method, so that a source electrode layer and a drain electrode layer are formed. Before formation of the gate insulating layer, cleaning treatment is performed on the oxide semiconductor layer.

The present disclosure relates to semiconductor structures and, more particularly, to a symmetric tunnel field effect transistor and methods of manufacture. The structure includes a gate structure including a source region and a drain region both of which comprise a doped VO.sub.2 region.

A display device includes a display element, a transistor configured to drive the display element, the transistor including a channel region, and a retention capacitor. An oxide semiconductor film is provided in areas across the transistor and the retention capacitor, the oxide semiconductor film including a first region formed in the channel region of the transistor, and a second region having a lower resistance than that of the first region. The second region is formed in the areas of the transistor and retention capacitor other than in the channel region.

With an image sensor in which the amplifier circuit is disposed at each pixel, there is such an issue that the threshold voltage of the transistor fluctuates so that the signal voltage fluctuates because a voltage is continuously applied between the source and the gate of the transistor at all times when using the amorphous thin film semiconductor as the transistor that constitutes an amplifier circuit. The gate-source potential of the TFT that constitutes the amplifier circuit is controlled so that the gate terminal voltage becomes smaller than the source terminal voltage in an integrating period where the pixels accumulate the signals, and controlled so that the gate terminal voltage becomes larger than the source terminal voltage in a readout period where the pixels output the signals.

Provided is a method for simply evaluating defects caused in interface states in oxide semiconductor thin films and protective films in TFTs having protective films formed on the surface of oxide semiconductor thin films without actually measuring the characteristics of the same.

This evaluation method evaluates defects caused in the interface states by measuring electron states in the oxide semiconductor thin film by a contact method or noncontact method. The defects caused in the interface states are any of the following (1)-(3). (1) Threshold value voltage (V.sub.th,) when a positive bias is applied to the thin-film transistor (2) Difference in threshold value voltage (V.sub.th) before and after applying the positive bias to the thin-film transistor (3) Threshold value during the first measurement when a plurality of measurements is made of the threshold value voltage when a positive bias is applied to the thin-film transistor.

A method for producing a thin film transistor including an oxide semiconductor layer includes: depositing an oxide semiconductor film above a substrate by a sputtering method; and forming the oxide semiconductor layer into a predetermined shape by processing the oxide semiconductor film, wherein in the depositing of an oxide semiconductor film, a first oxide semiconductor film is deposited by using a first power density, and a second oxide semiconductor film is then deposited on the first oxide semiconductor film by using a second power density different from the first power density.

Provided are: a sintered oxide which is capable of obtaining low carrier density and high carrier mobility when configured as an oxide semiconductor thin film by using a sputtering method; and a sputtering target which uses the same. The sintered oxide contains indium, gallium and copper as oxides. It is preferable for the gallium content to be 0.20-0.45, inclusive, when expressed as an atomic ratio (Ga/(In+Ga)), the copper content to be at least 0.001 and less than 0.03 when expressed as an atomic ratio (Cu/(In+Ga+Cu)), and for the sintering to be performed at 1,200-1,550 C., inclusive. A crystalline oxide semiconductor thin film obtained by forming this sintered oxide as a sputtering target makes it possible to achieve a carrier density of 3.010.sup.18 cm.sup.3 or lower, and a carrier mobility of 10 cm.sup.2V.sup.1 sec.sup.1 or higher.

To give favorable electrical characteristics to a semiconductor device. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a pair of electrodes over the semiconductor layer and each electrically connected to the semiconductor layer, a gate electrode over the semiconductor layer, and a gate insulating layer between the semiconductor layer and the gate electrode. The insulating layer includes an island-shaped projecting portion. A top surface of the projecting portion of the insulating layer is in contact with a bottom surface of the semiconductor layer, and is positioned on an inner side of the semiconductor layer when seen from above. The pair of electrodes covers part of a top surface and part of side surfaces of the semiconductor layer. Furthermore, the gate electrode and the gate insulating layer cover side surfaces of the projecting portion of the insulating layer.

A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).