H10D30/0314

MANUFACTURE METHOD OF TFT SUBSTRATE STRUCTURE AND TFT SUBSTRATE STRUCTURE
20170170202 · 2017-06-15 ·

The present invention provides a manufacture method of a TFT substrate structure and a TFT substrate structure. In the manufacture method of the TFT substrate structure according to the present invention, by adjusting the parameter of etching as manufacturing the gate, the angular surfaces are formed at the two sides of the gate, and the gate is used to be a mask to implement ion implantation to the polysilicon layer to form the n-type heavy doping area and the n-type light doping area are formed at the polysilicon layer at the same time. In the TFT structure according to the present invention, the polysilicon layer comprises n-type heavy doping areas at two sides and n-type light doping areas between the channel area of the polysilicon layer and the n-type heavy doping areas.

Array Substrate, Manufacturing Method Thereof, Display Device, Thin-Film Transistor (TFT) and Manufacturing Method Thereof
20170170214 · 2017-06-15 ·

An array substrate, a manufacturing method thereof, a display device, a thin-film transistor (TFT) and a manufacturing method thereof are disclosed. The method for manufacturing the TFT comprises: forming a pattern of an active layer and a gate insulating layer provided with a metal film on a base substrate; patterning the metal film by one patterning process, and forming patterns of a gate electrode, a source electrode, a drain electrode, a gate line and a data line; forming a passivation layer on the base substrate; patterning the passivation layer by one patterning process, and forming a source contact hole, a drain contact hole and a bridge structure contact hole; and forming a transparent conductive film on the base substrate, and removing partial transparent conductive film to form a source contact portion, a drain contact portion (214), a pixel electrode and a bridge structure. The manufacturing method can reduce the number of the patterning processes.

LOW TEMPERATURE POLY SILICON (LTPS) THIN FILM TRANSISTOR (TFT) AND THE MANUFACTURING METHOD THEREOF

The present disclosure discloses a LTPS TFT and the manufacturing method thereof. The method includes: forming a semiconductor layer and a LTPS layer on the same surface on a base layer; forming an oxide layer is formed on one side of the semiconductor layer facing away the base layer, and forming the oxide layer on one side of the LTPS layer facing away the base layer; forming a first photoresist layer of a first predetermined thickness on the oxide layer; arranging a corresponding first cobalt layer on each of the photoresist layers, a vertical projection of the first cobalt layer overlaps with the vertical projection of the corresponding first photoresist layer; doping high-concentration doping ions into a first specific area of the semiconductor layer. With such configuration, the number of the masking process is decreased and the manufacturing time is reduced.

Electroluminescence display device

Disclosed is an electroluminescence device having a substrate, a thin film transistor over the substrate, an insulating film over the thin film transistor, an electroluminescence element over the insulating film, a passivation film over the electroluminescence element, and a counter substrate over the passivation film. The electroluminescence element is configured to emit light through the counter substrate, and a space between the substrate and the counter substrate is filled with a filler. The electroluminescence device is featured by the tapered side surface of a gate electrode of the thin film transistor.

Method for manufacturing eye-protecting liquid crystal display device

A method for manufacturing an eye-protecting liquid crystal display device is disclosed, in which an ultraviolet light emitting material and a ultraviolet absorbent are added in a first planarization layer of an array substrate and a second planarization layer of a color filter substrate. The ultraviolet absorbent absorbs short-wavelength blue light having a wavelength less than 400 nm and ultraviolet light emitting from a backlight module. The short-wavelength blue light and the ultraviolet light so absorbed excite the ultraviolet light emitting material to give off long-wavelength visible blue light having a wavelength greater than 400 nm. The first and second planarization layers are thus useful in converting ultraviolet light and short-wavelength blue light having a wavelength less than 400 nm, which could damage human eyes, into long-wavelength visible blue light having a wavelength greater than 400 nm that does not damage human eyes.

P-Si TFT and method for fabricating the same, array substrate and method for fabricating the same, and display device

A method for fabricating a Polysilicon Thin-Film Transistor is provided. The method includes forming a polysilicon active layer, forming a first gate insulation layer and a first gate electrode sequentially on the active layer, conducting a first ion implantation process on the active layer by using the first gate electrode as a mask to form two doped regions at ends of the active layer, forming a second gate insulation layer and a second gate electrode sequentially on the first gate insulation layer and the first gate electrode, and conducting a second ion implantation process on the active layer by using the second gate electrode as another mask to form two source/drain implantation regions at two outer sides of the doped regions of the active layer. Accordingly, impurity concentration of the two doped regions is smaller than that of the two source/drain implantation regions.

MANUFACTURE METHOD OF LTPS THIN FILM TRANSISTOR AND LTPS THIN FILM TRANSISTOR
20170155002 · 2017-06-01 ·

The present invention provides a manufacture method of a LTPS thin film transistor and a LTPS thin film transistor. The gate isolation layer is first etched to form the recess, and then the gate is formed on the recess so that the width of the gate is slightly larger than the width of the recess. Then, the active layer is implemented with ion implantation to form the source contact region, the drain contact region, the channel region and one transition region at least located between the drain contact region and the channel region. The gate isolation layer above the transition region is thicker than the channel region and can shield a part of the gate electrical field to make the carrier density here lower than the channel region to form a transition.

Method of fabricating array substrate, array substrate and display device
12237344 · 2025-02-25 · ·

An OLED display device including a display area is provided. A first and second thin film transistors (TFTs) are arranged in the display area, the first TFT includes a first active layer, the second TFT includes a second active layer, a material of the first active layer is different from that of the second active layer. The OLED display device includes a substrate, the second active layer, a second gate of the second TFT, the first active layer, a first gate of the first TFT, a first source and drain of the first TFT, a second source and drain of the second TFT, a first data line in a same layer as the second source and drain, a first planarization layer on the first data line, and a second data line on the first planarization layer and electrically insulated from the first data line.

Semiconductor device

A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.

Semiconductor device and method of manufacturing the same

A semiconductor device includes a substrate, a first poly-material pattern, a first conductive element, a first semiconductor layer, and a first gate structure. The first poly-material pattern is over and protrudes outward from the substrate, wherein the first poly-material pattern includes a first active portion and a first poly-material portion joined to the first active portion. The first conductive element is over the substrate, wherein the first conductive element includes the first poly-material portion and a first metallic conductive portion covering at least one of a top surface and a sidewall of the first poly-material portion. The first semiconductor layer is over the substrate and covers the first active portion of the first poly-material pattern and the first conductive element. The first gate structure is over the first semiconductor layer located within the first active portion.