H10D30/0321

Manufacturing method of thin film transistor substrate

The invention provides a manufacturing method of a thin film transistor substrate including: sequentially forming a gate electrode, a gate insulating layer covering the gate electrode, an active material layer, and a photo-sensitive material layer on a first substrate; performing a photolithography process by using a half tone mask to form a protective layer which is above the gate electrode and has a first recess and a second recess; wet etching the active material layer by using the protective layer as a mask to form an active layer; removing a portion of the protective layer at bottoms of the first recess and the second recess to expose a first portion and a second portion of the active layer respectively; forming a first electrode connecting to the first portion; and forming a second electrode connecting to the second portion.

Method of manufacturing thin film transistor

A method of manufacturing a thin film transistor is disclosed. In one aspect, the method includes forming an active layer over a substrate and forming a gate insulating layer containing a dopant over the active layer. The method also includes irradiating laser light onto the gate insulating layer such that the dopant of the gate insulating layer diffuses into the active layer.

Oxide sintered body, sputtering target, and oxide semiconductor thin film obtained using sputtering target

Provided are: a sintered oxide which is capable of obtaining low carrier density and high carrier mobility when configured as an oxide semiconductor thin film by using a sputtering method; and a sputtering target which uses the same. The sintered oxide contains indium, gallium and copper as oxides. It is preferable for the gallium content to be 0.20-0.45, inclusive, when expressed as an atomic ratio (Ga/(In+Ga)), the copper content to be at least 0.001 and less than 0.03 when expressed as an atomic ratio (Cu/(In+Ga+Cu)), and for the sintering to be performed at 1,200-1,550 C., inclusive. A crystalline oxide semiconductor thin film obtained by forming this sintered oxide as a sputtering target makes it possible to achieve a carrier density of 3.010.sup.18 cm.sup.3 or lower, and a carrier mobility of 10 cm.sup.2V.sup.1 sec.sup.1 or higher.

SEMICONDUCTOR DEVICE
20170179167 · 2017-06-22 ·

Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF AND DISPLAY APPARATUS
20170179166 · 2017-06-22 ·

The present invention relates to an array substrate, which comprises: a display region and a drive circuit region; the drive circuit region comprises GOA units, the GOA unit comprising a substrate, a gate electrode layer, an insulation layer, an active layer and a source/drain electrode layer, and the drive circuit region further comprises a gate wire connecting to the gate electrode layer, and a source/drain layer wire at the same layer with the source/drain electrode layer, wherein the area between the portions of the gate wire and the source/drain layer wire which intercross with each other is only formed with the insulation layer. The invention further relates to a manufacturing method of an array substrate and a display apparatus comprising the array substrate.

Low temperature polysilicon thin film transistor and method for fabricating same

The present invention provides a low temperature polysilicon thin film transistor and a fabricating method thereof. According to the method, a laser annealing process is performed to a remained portion of a a-Si layer on a substrate to form a first lightly doped drain (LDD) terminal, a second LDD terminal, a first phosphor material structure and a second phosphor material structure. A gate metal layer is then formed on the remained portion of the a-Si layer. A source metal layer and a drain metal layer are formed on the first doped layer and the second doped layer located at opposite sides of the gate metal layer, respectively. The present invention use the high temperature of the laser annealing process to perform a heat diffusion of phosphor material to form the LDD terminal and the phosphor material structure, the times of photomasks are used is reduced, and the process is simplified.

Different lightly doped drain length control for self-align light drain doping process

A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack. The TFT stack includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes removing the first photoresist layer, and depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area. The method further includes doping the second portion of the doped semiconductor layer with a third doping dose, the first dose being higher than the second dose and the third dose.

Display device, array substrate and method for manufacturing the same
09685461 · 2017-06-20 · ·

A manufacturing method of an array substrate, an array substrate and a display device are provided. The array substrate includes a first thin film transistor and a pixel electrode (327), wherein, an active layer (324) and source and drain electrodes in the first thin film transistor as well as the pixel electrode (327) are formed by one patterning process. According to the invention, an array substrate with good performance can be manufactured only by three photolithography processes. Thus, the production cycle of a thin film transistor is shorted greatly, characteristics of the thin film transistor is improved, and meanwhile, yield of products is enhanced greatly.

Method of manufacturing a polysilicon (poly-Si) layer

A method of manufacturing a polysilicon (poly-Si) layer, a method of manufacturing an organic light-emitting display apparatus using the method, and an organic light-emitting display apparatus manufactured by using the method. The method includes forming an amorphous silicon (a-Si) layer on a substrate having first and second areas, thermally treating the a-Si layer to partially crystallize the a-Si layer into a partially crystallized Si layer, removing a thermal oxide layer through a thermal treatment, selectively irradiating the first areas with laser beams to crystallize the partially crystallized Si layer.

Display with semiconducting oxide and polysilicon transistors

A display may have an array of pixels controlled by display driver circuitry. The pixels may have pixel circuits. In liquid crystal display configurations, each pixel circuit may have an electrode that applies electric fields to an associated portion of a liquid crystal layer. In organic light-emitting diode displays, each pixel circuit may have a drive transistor that applies current to an organic light-emitting diode in the pixel circuit. The pixel circuits and display driver circuitry may have thin-film transistor circuitry that includes transistor such as silicon transistors and semiconducting-oxide transistors. Semiconducting-oxide transistors and silicon transistors may be formed on a common substrate. Semiconducting-oxide transistors may have polysilicon layers with doped regions that serve as gates. Semiconducting-oxide channel regions overlap the gates. Transparent conductive oxide and metal may be used to form source-drain terminals that are coupled to opposing edges of the semiconducting oxide channel regions.