A method of manufacturing a detector capable of detecting a wavelength range [.sub.8; .sub.14] centered on a wavelength .sub.10, including: forming said device on a substrate by depositing a sacrificial layer totally embedding said device; forming, on the sacrificial layer, a cap including first, second, and third optical structures transparent in said range [.sub.8; .sub.14], the second and third optical structures having equivalent refraction indexes at wavelength .sub.10 respectively greater than or equal to 3.4 and smaller than or equal to 2.3; forming a vent of access to the sacrificial layer through a portion of the cap, and then applying, through the vent, an etching to totally remove the sacrificial layer.

Systems and methods may be provided for fabricating infrared focal plane arrays. The methods include providing a device wafer, applying a coating to the device wafer, mounting the device wafer to a first carrier wafer, thinning the device wafer while the device wafer is mounted to the first carrier wafer, releasing the device wafer from the first carrier wafer, singulating the device wafer into individual dies, each die having an infrared focal plane array, and hybridizing the individual dies to a read out integrated circuit.

A superlattice cell that includes Group IV elements is repeated multiple times so as to form the superlattice. Each superlattice cell has multiple ordered atomic planes that are parallel to one another. At least two of the atomic planes in the superlattice cell have different chemical compositions. One or more of the atomic planes in the superlattice cell one or more components selected from the group consisting of carbon, tin, and lead. These superlattices make a variety of applications including, but not limited to, transistors, light sensors, and light sources.

A method of manufacturing a semiconductor device, includes: forming an insulating film on a first surface of a semiconductor substrate; and forming a hydrogen supply film on a second surface facing the first surface of the semiconductor substrate, the hydrogen supply film containing one or more of silicon oxide, TEOS, BPSG, BSG, PSG, FSG, carbon-containing silicon oxide, silicon nitride, carbon-containing silicon nitride, and oxygen-containing silicon carbide.

Presented herein is a device including an image sensor having a plurality of pixels disposed in a substrate and configured to sense light through a back side of the substrate and an RDL disposed on a front side of the substrate and having a plurality of conductive elements disposed in one or more dielectric layers. A sensor shield is disposed over the back side of the substrate and extending over the image sensor. At least one via contacts the sensor shield and extends from the sensor shield through at least a portion of the RDL and contacts at least one of the plurality of conductive elements.

A method of manufacturing a pinned photodiode, including: forming a region of photon conversion into electric charges of a first conductivity type on a substrate of the second conductivity type; coating said region with a layer of a heavily-doped insulator of the second conductivity type; and annealing to ensure a dopant diffusion from the heavily-doped insulator layer.

An angle limiting filter includes: a first light-shielding layer containing a first light-shielding material and provided with a first opening; a second light-shielding layer containing a second light-shielding material and located in a region which surrounds at least one portion of the first light-shielding layer; a third light-shielding layer containing the first light-shielding material, provided with a second opening at least one portion of which overlaps the first opening, and located above the first light-shielding layer; and a fourth light-shielding layer containing the second light-shielding material and located above the second light-shielding layer in a region which surrounds at least one portion of the third light-shielding layer.

An image sensor structure includes a region of semiconductor material having a first major surface and a second major surface. A pixel structure is within the region of semiconductor material and includes a plurality of doped regions and a plurality of conductive structures. A metal-filled trench structure extends from the first major surface to the second major surface. A first contact structure is electrically connected to a first surface of the conductive trench structure, and a second contact structure electrically connected to a second surface of the conductive trench structure. In one embodiment, the second major surface is configured to receive incident light.

An image sensor includes a light receiving element, an anti-reflection layer, a high refractive pattern, a color filter, and a micro lens. The light receiving element is formed on a semiconductor substrate to generate charges responsive to incident light. The anti-reflection layer is formed on the semiconductor substrate. The high refractive pattern is formed on the anti-reflection layer in correspondence with the light receiving element. The color filter is formed on the anti-reflection layer while covering a top surface and lateral sides of the high refractive pattern. The micro lens is formed on the color filter, The image sensor provides an image having high quality.

A first plasmonic-nanostructure sensor pixel includes a semiconductor substrate and a plurality of metal pillars. The semiconductor substrate has a top surface and a photodiode region therebeneath. The plurality of metal pillars is at least partially embedded in the substrate and extends from the top surface in a direction substantially perpendicular to the top surface. A second plasmonic-nanostructure sensor pixel includes (a) a semiconductor substrate having a top surface, (b) an oxide layer on the top surface, (c) a thin-film coating between the top surface and the oxide layer, and (d) a plurality of metal nanoparticles (i) at least partially between the top surface and the oxide layer and (ii) at least partially embedded in at least one of the thin-film coating and the oxide layer. A third plasmonic-nanostructure sensor pixel includes features of both the first and second plasmonic-nanostructure sensor pixels.