a CMOS image sensor including a pixel array unit having pixels arranged in even-numbered pixel rows and odd-numbered pixel rows. A reading operation performed such that a first signal of a first pixel group is read in a first accumulation time, and a second signal of a second pixel group is read in a second accumulation time shorter than said first accumulation time.

An image sensor includes a substrate having a plurality of unit pixels, a photoelectric device portion and a storage device portion disposed in the substrate and constituting the plurality of unit pixels, a device isolation structure disposed in the substrate and partitioning the plurality of unit pixels, and an overflow gate providing an overflow path between the photoelectric device portion and the storage device portion according to a certain voltage, wherein the device isolation structure is partially opened at a boundary between the photoelectric device portion and the storage device portion.

A shared pixel includes a plurality of photo diode regions, a shared floating diffusion region, a plurality of transfer gates and a blooming layer. Each of the photo diode regions generates photo-charges in response to incident light. The photo diode regions are formed in a semiconductor substrate. The shared floating diffusion region is shared by the plurality of photo diode regions. The shared floating diffusion region is separated from the plurality of photo diode regions in the semiconductor substrate. Each of the transfer gates transfers the photo-charges of a corresponding photo diode region to the shared floating diffusion region in response to a transfer control signal. The blooming layer transfers overflow photo-charges to a power supply voltage node.

A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer.

A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer.

A solid-state imaging device, a method for driving the solid-state imaging device, and an electronic apparatus capable of suppressing occurrence of motion distortion while realizing widening of dynamic range and in turn realizing a higher image quality are provided. Each pixel includes a photo diode PD which accumulates a charge generated by photo-electric conversion in an accumulation period, a transfer transistor capable of transferring the accumulated charge in a transfer period, a floating diffusion FD to which the charge accumulated in the photo diode PD is transferred, a source-follower transistor which converts the charge of the floating diffusion FD to a voltage signal in accordance with the charge quantity, and a capacity changing portion capable of changing the capacity of the floating diffusion FD in accordance with a capacity changing signal, the capacity of the floating diffusion FD being changed by the capacity changing portion in a predetermined period in one readout period with respect to the accumulation period and a conversion gain being switched in this one readout period.

An image sensor employing deep trench spacing isolation is provided. A plurality of pixel sensors is arranged over or within a semiconductor substrate. A trench is arranged in the semiconductor substrate around and between adjacent ones of the plurality of pixel sensors, and the trench has a gap located between sidewalls of the trench. A cap is arranged over or within the trench at a position overlying the gap. The cap seals the gap within the trench. A method of manufacturing the image sensor is also provided.

A pixel sensor having a main photodetector and a parasitic photodiode and a method for reading out that pixel sensor are disclosed. The pixel sensor is read by reading a first potential on a floating diffusion node in the pixel sensor while the floating diffusion node is isolated from the main photodiode. The pixel sensor is then exposed to light, such, that the floating diffusion node and the photodetector are both exposed to the light. A second potential on the floating diffusion node is then readout while the floating diffusion node is isolated from the main photodiode. After the first and second potentials are readout a third potential on the floating diffusion node is readout. The main photodiode is then connected to the floating diffusion node, and a fourth potential on the floating diffusion node is readout First and second light intensities are determined from the readout potentials.

A solid-state imaging device including is provided. The solid-state imaging device includes: pixels arrayed; a photoelectric conversion element in each of the pixels; a read transistor for reading electric charges photoelectrically-converted in the photoelectric conversion elements to a floating diffusion portion; a shallow trench element isolation region bordering the floating diffusion portion; and an impurity diffusion isolation region for other element isolation regions than the shallow trench element isolation region.

A pixel array that includes some pixels with high absorption (HA) structures and other pixels without HA structures exhibits increased dynamic range for near infrared (NIR) light. Additionally, the pixel array is a uniform array of photodiodes and thus does not exhibit current leakage that would have been caused by irregular isolation structures. Additionally, the pixel array may further a lateral overflow integration capacitor to further increase the dynamic range for NIR light.