The present inventive concept relates to a thin-film transistor and a manufacturing method therefor. The thin film transistor comprises: a gate electrode; an active layer spaced apart from the gate electrode; a source electrode provided on one side of the active layer; a drain electrode provided on the other side of the active layer; and a contact layer provided in at least one between the active layer and the source electrode and between the active layer and the drain electrode. The contact layer includes a first metal oxide of at least one selected from Zn, In, and Ga.

The present disclosure provides a double gate transistor that includes a first gate electrode configured in an inverse taper shape on a first gate insulating layer, a buffer layer disposed to cover the first gate electrode, an active layer disposed on the buffer layer, a second gate insulating layer disposed to cover the active layer, and a second gate electrode configured in a taper shape on the second gate insulating layer, and a display device including the double gate transistor.

The present application provides an array substrate, a preparing method thereof, a display panel. The array substrate includes a substrate and a first conductive layer, an active layer, a second conductive layer and a third conductive layer all provided on the substrate. A source contact portion of the active layer is connected to a source electrode of the first conductive layer. The second conductive layer includes a gate electrode disposed correspondingly to a channel portion. A pixel electrode of the third conductive layer is connected to a drain contact portion of the active layer. At least one of the first conductive layer and the second conductive layer further includes a common electrode disposed corresponding to the pixel electrode.

A semiconductor device may include a substrate, source/drain electrodes on the substrate, a channel layer on the source/drain electrodes, a barrier film on the channel layer, a gate electrode on the barrier film, and an intermediate layer between a corresponding one of the source/drain electrodes and the channel layer, the intermediate layer including metal oxide, wherein the channel layer may include an oxide semiconductor material, and the oxide semiconductor material may include tellurium (Te) oxide and one or more oxides of sulfur (S) or selenium (Se).

A method of manufacturing a thin-film transistor in a display pixel circuit includes forming a gate electrode, forming, a gate insulating layer including a ferroelectric material on the gate electrode, forming a capping layer including a semiconductor layer on the gate insulating layer, and a metal layer on the semiconductor layer, wherein the semiconductor layer includes an oxide semiconductor, configuring the gate insulating layer to exhibit ferroelectricity, through a primary heat treatment process, and forming source/drain electrodes by patterning the metal layer.

A display module includes a substrate; a semiconductor pattern provided on the substrate and including a gate region, a drain region, and a source region; a first insulating layer provided on the substrate, and covering a region of the semiconductor pattern other than the drain region and the source region; a gate electrode provided on a region of the first insulating layer corresponding to the gate region of the semiconductor pattern; a second insulating layer provided on the first insulating layer and covering the gate electrode; a first barrier pattern provided on the drain region; a second barrier pattern provided on the source region; a drain electrode provided on the first barrier pattern; and a source electrode provided on the second barrier pattern.

A method for manufacturing a semiconductor structure is provided. The method may include several operations. A substrate is provided, received or formed, wherein the substrate includes an epitaxial structure in a fin structure of the substrate and a metal gate structure over the fin structure. An insulating layer covering the metal gate structure is formed. A semiconductive material layer is formed over the epitaxial structure and the insulating layer, wherein a first portion of the semiconductive material layer over the epitaxial structure comprises crystalline semiconductive material, and a second portion of the semiconductive material layer over the insulating layer comprises amorphous semiconductive material. The second portion of the semiconductive material layer is removed. A semiconductor structure thereof is also provided.